Patents by Inventor Bhavin Shah

Bhavin Shah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060228892
    Abstract: A discontinuous layer is formed on a transparent substrate of a semiconductor material. Portions of the transparent substrate are exposed at discontinuities in the discontinuous layer. The discontinuous layer and the exposed portions of the transparent substrate are etched at least until the discontinuous layer is completely removed, thereby forming peaks and valleys in the substrate.
    Type: Application
    Filed: April 6, 2005
    Publication date: October 12, 2006
    Inventors: Dennis Lazaroff, Arthur Piehl, Bhavin Shah
  • Publication number: 20060211930
    Abstract: The present invention is directed toward a pulse oximetry system for the determination of a physiological parameter capable of removing motion artifacts from physiological signals comprises a hardware subsystem and a software subsystem. The software subsystem is used in conjunction with the hardware subsystem to perform a method for removing a plurality of motion artifacts from the photo-plethysmographic data and for obtaining a measure of at least one physiological parameter from the data.
    Type: Application
    Filed: January 30, 2006
    Publication date: September 21, 2006
    Inventors: John Scharf, Bhavin Shah
  • Patent number: 7020507
    Abstract: The present invention is directed toward a pulse oximetry system for the determination of a physiological parameter capable of removing motion artifacts from physiological signals comprises a hardware subsystem and a software subsystem. The software subsystem is used in conjunction with the hardware subsystem to perform a method for removing a plurality of motion artifacts from the photo-plethysmographic data and for obtaining a measure of at least one physiological parameter from the data.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: March 28, 2006
    Assignee: Dolphin Medical, Inc.
    Inventors: John E. Scharf, Bhavin Shah
  • Publication number: 20060004407
    Abstract: Described are medical devices useful for applying a bolster material to a surgical fastening device such as a stapler, and related methods of manufacture and use. The devices include an applicator element for receipt between arms of the stapler, and a bolster material, desirably a remodelable extracellular matrix material, coupled to the applicator element. In certain embodiments, the bolster material is held by the applicator element, for example having at least a portion looped around or received through or over a portion of the applicator element. Also described are unique implantable materials including coatings of dried, reversible adhesive.
    Type: Application
    Filed: February 17, 2005
    Publication date: January 5, 2006
    Inventors: Michael Hiles, Umesh Patel, Bhavin Shah, Chad McAlexander
  • Patent number: 5796976
    Abstract: Information is stored in temporary storage and subsequently transferred to a memory over a bus. The temporary storage is provided with a plurality of entries each of which has a selected size that is smaller than a size of the bus. Information that is designated for a common area of the memory is stored in different entries, and the different entries are linked. Before being transferred to memory, the information from linked entries is assembled. The assembled information is then transferred over the bus to memory. Embodiments of the temporary storage include a write queue and a write buffer.
    Type: Grant
    Filed: January 23, 1996
    Date of Patent: August 18, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Bhavin Shah, Era Nangia, Gilbert Wolrich, Nital Patwa
  • Patent number: 5418973
    Abstract: A digital computer system includes a scalar CPU, a vector processor, and a shared cache memory. The scalar CPU has an execution unit, a memory management unit, and a cache controller unit. The execution unit generates load/store memory addresses for vector load/store instructions. The load/store addresses are translated by the memory management unit, and stored in a write buffer that is also used for buffering scalar write addresses and write data. The cache controller coordinates-loads and stores between the vector processor and the shared cache with scalar reads and writes to the cache. Preferably the cache controller permits scalar reads to precede scalar writes and vector load/stores by checking for conflicts with scalar writes and vector load/stores in the write queue, and also permits vector load/stores to precede vector operates by checking for conflicts with vector operate information stored in a vector register scoreboard.
    Type: Grant
    Filed: June 22, 1992
    Date of Patent: May 23, 1995
    Assignee: Digital Equipment Corporation
    Inventors: James P. Ellis, Era Nangia, Nital Patwa, Bhavin Shah, Gilbert M. Wolrich