Patents by Inventor Bhavya Krishna

Bhavya Krishna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240256180
    Abstract: A data storage device and method for host-assisted deferred defragmentation and system handling are provided. In one embodiment, the data storage device comprises a memory and a controller. The controller is configured to receive, from a host, a plurality of write commands and a grouping identifier associated with the plurality of write commands, wherein the plurality of write commands comprise a plurality of non-sequential logical block addresses and a plurality of sequential segments of a file; and in response to the grouping identifier being associated with the plurality of write commands, execute the plurality of write commands by storing the plurality of sequential segments of the file sequentially in the memory even though the logical block addresses associated with the segments of the file are non-sequential. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.
    Type: Application
    Filed: July 19, 2023
    Publication date: August 1, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Ramanathan Muthiah, Ramkumar Ramamurthy, Bhavya Krishna
  • Patent number: 12013753
    Abstract: Devices, systems, and methods with proactive data loss notification and handling. A data storage device includes a memory and a controller. The controller includes a processor and controller memory. The controller memory stores a set of instructions that, when executed by the processor, instruct the controller to: detect an uncorrectable error correction code (UECC) during an internal data movement process of the storage device memory, modify a metadata field associated with a logical block address corresponding to the UECC, inform a host device about the UECC, and determine whether data stored in at least one adjacent region to the logical block address is lost.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: June 18, 2024
    Assignee: Western Digital Technologies, Inc.
    Inventors: Bhavya Krishna, Ramanathan Muthiah
  • Publication number: 20230385148
    Abstract: Devices, systems, and methods with proactive data loss notification and handling. A data storage device includes a memory and a controller. The controller includes a processor and controller memory. The controller memory stores a set of instructions that, when executed by the processor, instruct the controller to: detect an uncorrectable error correction code (UECC) during an internal data movement process of the storage device memory, modify a metadata field associated with a logical block address corresponding to the UECC, inform a host device about the UECC, and determine whether data stored in at least one adjacent region to the logical block address is lost.
    Type: Application
    Filed: May 24, 2022
    Publication date: November 30, 2023
    Inventors: Bhavya Krishna, Ramanathan Muthiah