Patents by Inventor Bheom Soon Joo

Bheom Soon Joo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090154337
    Abstract: An Ethernet protection switching method based on a change in link status in a link aggregation sublayer is disclosed. If an Ethernet link aggregation sublayer is present on an Ethernet connection path, a link aggregation sublayer Management Entity Group (MEG) end point is assigned to the Ethernet link aggregation sublayer to generate a link aggregation message for Ethernet connection management and protection switching. When a change in link status is detected in the Ethernet link aggregation sublayer, the link-aggregation-sublayer MEG end point generates and sends the link aggregation message to an MEG end point performing Ethernet connection management and protection switching. Adequate Ethernet protection switching may be performed even in the presence of the link aggregation sublayer.
    Type: Application
    Filed: June 2, 2008
    Publication date: June 18, 2009
    Inventors: Dae-ub Kim, Jeong-dong Ryoo, Bheom-soon Joo, Young-sun Kim
  • Publication number: 20090135833
    Abstract: Provided are an ingress node and an egress node on a Multi-Protocol Label Switching (MPLS) network, with an improved packet transfer rate, and a packet transfer rate improving method in a MPLS network system. By assigning a MPLS label to a destination MAC address of a packet in order to guarantee Quality of Service (QoS), it is possible to distributively transmit packets through a variety of paths on a MPLS network and thus improve a packet transfer rate.
    Type: Application
    Filed: May 30, 2008
    Publication date: May 28, 2009
    Inventors: Won-kyoung Lee, Jae-woo Park, Bheom-soon Joo
  • Publication number: 20090106773
    Abstract: A method and system for user-friendly forwarding entry management based on inter-process communication (IPC) is provided. The system includes a function input unit inputting a command for forwarding entry management; and an automated process unit verifying parameters included in the function to create a user table, extracting information for creating a forwarding entry management table from the user table, and outputting a forwarding entry management message including the extracted information. The method includes inputting a command for forwarding entry management; verifying parameters included in the command; creating a user table using the parameters if the verification is successful; extracting information for creating a forwarding entry management table from the user table; and outputting a forwarding entry management message including the extracted information.
    Type: Application
    Filed: June 11, 2008
    Publication date: April 23, 2009
    Inventors: Won-kyoung Lee, Jae-woo Park, Young-sik Chung, Bheom-soon Joo
  • Patent number: 7508838
    Abstract: Provided is an Ethernet port apparatus supporting multiple physical media, a physical medium managing method, and a switching system using the same. The Ethernet port apparatus of the present research can use and manage multiple transmission media by freely selecting and exchanging the transmission media in a system using an Ethernet port. The Ethernet port apparatus supporting multiple physical media, which includes: a main board unit for supporting hot swap and power supply; a detachable physical medium-based sub-board unit for generating a control signal, transmitting the control signal to the main board means, performing a transceiving function suitable for the desired physical medium; and a physical medium support fixing unit for transmitting variable power, a power control signal, a physical medium control signal, a physical medium state information, and physical medium-dependent bitstream between the main board unit and the sub-board unit.
    Type: Grant
    Filed: May 2, 2005
    Date of Patent: March 24, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dae-Ub Kim, Tae-Sik Cheung, Bheom-Soon Joo, Hae-Won Jung
  • Patent number: 7496115
    Abstract: Provided are an apparatus for multiplexing Gigabit Ethernet frames and an apparatus for demultiplexing 10-Gigabit Ethernet frames. The apparatus for multiplexing Gigabit Ethernet frames includes at least one pre-processing unit, a multiplexing unit, an SDR/DDR conversion unit, and a control unit. The at least one pre-processing unit receives Gigabit Ethernet frames, converts the Gigabit Ethernet frames into 10-Gigabit Ethernet frames, and outputs the 10-Gigabit Ethernet frames. The multiplexing unit receives the 10-Gigabit Ethernet frames, time division multiplexes the 10-Gigabit Ethernet frames in frame units, and outputs the time division multiplexed 10-Gigabit Ethernet frames as first data. The SDR/DDR conversion unit, which converts the first data into second data having two 32-bit bus structures and outputs the second data. The control unit outputs a first control signal in response to an output request of the pre-processing unit.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: February 24, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chang Ho Choi, Bheom Soon Joo, Do Yeon Kim, Hae Won Jung
  • Patent number: 7450525
    Abstract: Provided is a topology discovery method for an Ethernet network that can effectively discover a physical topology with respect to the Ethernet network of a mesh structure without developing and using a separate control protocol. The topology discovery method in an Ethernet network includes the steps of: acquiring an interface management information base (MIB) and a bridge MIB; defining and storing information for discovering a physical topology; discovering an edge bridge that divides a boundary between a bridge network and a host network; discovering the physical topology with respect to the bridge network by using the schema; discovering the connection relationship with the host network by using an address learning address forwarding table (AFT) with respect to the edge bridge included in the bridge network; and outputting the connection relationship of the bridge network and the host network as a graph.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: November 11, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Myung-Hee Son, Bheom-Soon Joo, Hae-Won Jung
  • Publication number: 20080138084
    Abstract: Provided are a method and apparatus for transmitting error information between an Ethernet network and a synchronous digital hierarchy (SDH) network. According to the present invention, when an error occurs in the Ethernet network or the SDH network, OAM information is transferred to the opposite network by using a conventional MAC control frame from a linked part of the Ethernet network and the SDH network and thus the EoS network may be efficiently operated and managed. Also, by using standardized MAC control frame, the present invention may be applied to an existing system without additionally changing hardware or defining a new OAM frame.
    Type: Application
    Filed: November 29, 2007
    Publication date: June 12, 2008
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Ji Wook Youn, Bheom Soon Joo, Jung Sik Kim
  • Publication number: 20080114893
    Abstract: An apparatus and method for guaranteeing a service specific bandwidth in an Ethernet frame transmission system. In the method, memory status information of an input frame buffer and usable bandwidth information of a present Ethernet network are obtained if congestions or errors occur in the Ethernet frame transmission system. Then, different pause times by service specific priorities are set based on the memory status information and the usable bandwidth information. A MAC control frame including the pause frame is provided to the corresponding adjacent nodes. A media access control processor, if the received Ethernet frame is the MAC control frame, detects the pause times by priorities in the detected pause frame. A single processor generates drop information by priorities. A network processor drops a corresponding Ethernet frame according to the drop information by priorities, which is generated from the signal processor.
    Type: Application
    Filed: October 25, 2007
    Publication date: May 15, 2008
    Inventors: Ji Wook YOUN, Bheom Soon JOO, Jung Sik KIM
  • Patent number: 7308062
    Abstract: Provided is an apparatus for providing a system clock synchronized to a network universally. The apparatus includes a network synchronization reference signal generating unit that outputs a reference signal for network synchronization; a network synchronization controller that generates a first control voltage that allows a first clock pulse to be in synchronization with the reference signal for network synchronization; an OVCXO that generates the first clock pulse by application of the first control voltage; a system synchronization reference signal generator that generates reference signals for system synchronization; a system synchronization controller that generates a second control voltage that allows the system clock to be in synchronization with the reference signal for system synchronization; a VCO that generates a second clock pulse by application of the second control voltage; and a system clock generator that outputs the system clock.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: December 11, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Bheom Soon Joo, Jae Jeong Lee, Hae Won Jung, Young Sun Kim
  • Publication number: 20070086456
    Abstract: An integrated layer frame processing device for supporting Internet Protocol version 6 (Ipv6), in which the number of bytes to be processed is more than in Ipv4, and securing a bandwidth of at least several gigabits using an existing network processor is provided. The integrated layer frame processing device includes a variable header into which information is compressed and inserted and a hash key is generated in a data field that is recognized by a network processor so as to support a packet processing protocol for a system including a frame switch and a router. The integrated layer frame processing device is disposed between a physical layer and layer 2 processor and the network processor. Since the integrated layer frame processing device includes the variable header, a case where the number of bytes that are to be processed by the network processor is increased can be managed appropriately.
    Type: Application
    Filed: December 7, 2006
    Publication date: April 19, 2007
    Inventors: Dae ub Kim, Bheom Soon Joo, Jung Sik Kim
  • Patent number: 7185134
    Abstract: An apparatus for managing Ethernet physical layer registers and a method thereof are provided. The apparatus comprises a central processing unit (CPU) with an external bus interface function, and an interface conversion unit which is connected to the CPU through the external bus interface, converts the external bus interface into management data input/output (MDIO) interface and performs communications with the physical layer apparatus.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: February 27, 2007
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Daeub Kim, Bheom Soon Joo, Hae Won Jung, Hyeong Ho Lee
  • Publication number: 20060156105
    Abstract: Provided are a data receiving apparatus that can determine data by adjusting a reference level for determining a logic value of inputted data based on Inter-Symbol Interference in a data signal inputted through a transmission line, and receive the data without errors by compensating for timing margin decrease caused by the inter-symbol interference, and a method thereof. The apparatus includes: a reference generator for monitoring the level of an inputted data signal or generating reference levels according to an external control command; a comparator for comparing the inputted data with the reference levels and determining logic values of the inputted data; a selector for selecting the logic values of the inputted data as a valid logic value; and a selection controller for monitoring the valid logic value of the selector, transmitting a selection control signal to the selector, and controlling a process for selecting the valid logic value.
    Type: Application
    Filed: July 13, 2005
    Publication date: July 13, 2006
    Inventors: Tae-Sik Cheung, Dae-Ub Kim, Bheom-Soon Joo, Hae-Won Jung
  • Publication number: 20060133299
    Abstract: Provided is a topology discovery method for an Ethernet network that can effectively discover a physical topology with respect to the Ethernet network of a mesh structure without developing and using a separate control protocol. The topology discovery method in an Ethernet network includes the steps of: acquiring an interface management information base (MIB) and a bridge MIB; defining and storing information for discovering a physical topology; discovering an edge bridge that divides a boundary between a bridge network and a host network; discovering the physical topology with respect to the bridge network by using the schema; discovering the connection relationship with the host network by using an address learning address forwarding table (AFT) with respect to the edge bridge included in the bridge network; and outputting the connection relationship of the bridge network and the host network as a graph.
    Type: Application
    Filed: September 15, 2005
    Publication date: June 22, 2006
    Inventors: Myung-Hee Son, Bheom-Soon Joo, Hae-Won Jung
  • Publication number: 20060120394
    Abstract: Provided is an Ethernet port apparatus supporting multiple physical media, a physical medium managing method, and a switching system using the same. The Ethernet port apparatus of the present research can use and manage multiple transmission media by freely selecting and exchanging the transmission media in a system using an Ethernet port. The Ethernet port apparatus supporting multiple physical media, which includes: a main board unit for supporting hot swap and power supply; a detachable physical medium-based sub-board unit for generating a control signal, transmitting the control signal to the main board means, performing a transceiving function suitable for the desired physical medium; and a physical medium support fixing unit for transmitting variable power, a power control signal, a physical medium control signal, a physical medium state information, and physical medium-dependent bitstream between the main board unit and the sub-board unit.
    Type: Application
    Filed: May 2, 2005
    Publication date: June 8, 2006
    Inventors: Dae-Ub Kim, Tae-Sik Cheung, Bheom-Soon Joo, Hae--Won Jung
  • Publication number: 20050135530
    Abstract: Provided is an apparatus for providing a system clock synchronized to a network universally. The apparatus includes a network synchronization reference signal generating unit that outputs a reference signal for network synchronization; a network synchronization controller that generates a first control voltage that allows a first clock pulse to be in synchronization with the reference signal for network synchronization; an OVCXO that generates the first clock pulse by application of the first control voltage; a system synchronization reference signal generator that generates reference signals for system synchronization; a system synchronization controller that generates a second control voltage that allows the system clock to be in synchronization with the reference signal for system synchronization; a VCO that generates a second clock pulse by application of the second control voltage; and a system clock generator that outputs the system clock.
    Type: Application
    Filed: August 25, 2004
    Publication date: June 23, 2005
    Inventors: Bheom Soon Joo, Jae Jeong Lee, Hae Won Jung, Young Sun Kim
  • Publication number: 20040103198
    Abstract: An apparatus for managing Ethernet physical layer registers and a method thereof are provided. The apparatus comprises a central processing unit (CPU) with an external bus interface function, and an interface conversion unit which is connected to the CPU through the external bus interface, converts the external bus interface into management data input/output (MDIO) interface and performs communications with the physical layer apparatus.
    Type: Application
    Filed: November 6, 2003
    Publication date: May 27, 2004
    Inventors: Daeub Kim, Bheom Soon Joo, Hae Won Jung, Hyeong Ho Lee