Abstract: Disclosed are methods, systems, devices, apparatus, media, design structures, and other implementations, including a method for crest factor reduction (CFR) processing that includes receiving a first complex-valued sample of a signal for radio transmission, determining a resultant clipped complex-valued sample for the first complex-valued sample, resulting from projection of a second complex-valued sample, associated with the first complex-valued sample, into a selected one of a plurality of different tangent lines that are tangential to a circle representation with a radius h in a complex-valued plane, and processing the signal using the determined clipped complex-valued sample to produce a resultant CFR signal.

Abstract: An apparatus and method for data centric multiplexing in a wireless communication system with a plurality of channels comprising assigning a first resource to a first of the plurality of channels; assigning a second resource to a second of the plurality of channels wherein the second resource is not the first resource; assigning a third resource to a third of the plurality of channels wherein the third resource is not the first or the second resource; and assigning a fourth resource to a fourth of the plurality of channels by puncturing at least one of the first, second or third resources and skipping the rest of unpunctured first, second or third resources. Further disclosed are apparatus and method for an asynchronous command interface to an encoder and multiplexer module in a wireless communication system.

Abstract: Apparatus and methods for using a linear memory model for encoder output buffering are disclosed. The apparatus and method effect linear memory output buffering by dividing an encoder operation having N sequential frames to be encoded by an encoder into N encoder operations each designated for a single frame transmission, such as in the case of extended frame transmissions having multiple frames. Bits of the N encoder operations are then sequentially buffered in an encoder output buffer, wherein bits of each buffered encoder operation of the N encoder operations are read out of the buffer to a multiplexer engine while bits of a next encoder operation of the N encoder operations is being stored in the encoder output buffer.

Abstract: An apparatus and method for data centric multiplexing in a wireless communication system with a plurality of channels comprising assigning a first resource to a first of the plurality of channels; assigning a second resource to a second of the plurality of channels wherein the second resource is not the first resource; assigning a third resource to a third of the plurality of channels wherein the third resource is not the first or the second resource; and assigning a fourth resource to a fourth of the plurality of channels by puncturing at least one of the first, second or third resources and skipping the rest of unpunctured first, second or third resources. Further disclosed are apparatus and method for an asynchronous command interface to an encoder and multiplexer module in a wireless communication system.

Abstract: An apparatus and method for hybrid automatic repeat request (HARQ) encoding comprising re-encoding a subpacket from a plurality of subpackets to obtain a codeword; maintaining a set of state variables for each of the plurality of subpackets; initializing the set of state variables at HARQ transmit start; updating the set of state variables at HARQ transmit end; and using the set of updated state variables to determine a portion of the codeword to be transmitted.

Abstract: Apparatus and methods for using a linear memory model for encoder output buffering are disclosed. The apparatus and method effect linear memory output buffering by dividing an encoder operation having N sequential frames to be encoded by an encoder into N encoder operations each designated for a single frame transmission, such as in the case of extended frame transmissions having multiple frames. Bits of the N encoder operations are then sequentially buffered in an encoder output buffer, wherein bits of each buffered encoder operation of the N encoder operations are read out of the buffer to a multiplexer engine while bits of a next encoder operation of the N encoder operations is being stored in the encoder output buffer.