Patents by Inventor Bhushan Bharat

Bhushan Bharat has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11359149
    Abstract: The invention relates to a process configuration for production of light olefins and aromatics from residual hydrocarbon streams. In this configuration a high severity catalytic cracking process is employed for producing higher yields of lighter olefins and various boiling fractions. C4 stream separated from gaseous product is subjected to metathesis and aromatized to form mono aromatics.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: June 14, 2022
    Assignee: INDIAN OIL CORPORATION LIMITED
    Inventors: Srinivas Kunche Babu, Bhushan Bharat, Vetterkunnel Kumaran Satheesh, Debasis Bhattacharyya, Shailendra Kumar Sharma, Sankara Sri Venkata Ramakumar
  • Publication number: 20210324279
    Abstract: The invention relates to a process configuration for production of light olefins and aromatics from residual hydrocarbon streams. In this configuration a high severity catalytic cracking process is employed for producing higher yields of lighter olefins and various boiling fractions. C4 stream separated from gaseous product is subjected to metathesis and aromatized to form mono aromatics.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 21, 2021
    Inventors: Srinivas KUNCHE BABU, Bhushan BHARAT, Vetterkunnel Kumaran SATHEESH, Debasis BHATTACHARYYA, Shailendra Kumar SHARMA, Sankara Sri Venkata RAMAKUMAR
  • Patent number: 10431732
    Abstract: Shielded semiconductor devices and methods for fabricating shielded semiconductor devices are provided. An exemplary magnetically shielded semiconductor device includes a substrate having a top surface and a bottom surface. An electromagnetic-field-susceptible semiconductor component is located on and/or in the substrate. The magnetically shielded semiconductor device includes a top magnetic shield located over the top surface of the substrate. Further, the magnetically shielded semiconductor device includes a bottom magnetic shield located under the bottom surface of the substrate. Also, the magnetically shielded semiconductor device includes a sidewall magnetic shield located between the top magnetic shield and the bottom magnetic shield.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: October 1, 2019
    Assignees: GLOBALFOUNDRIES SINGAPORE PTE. LTD., AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCH
    Inventors: Bhushan Bharat, Shan Gao, Danny Pak-Chum Shum, Wanbing Yi, Juan Boon Tan, Wei Yi Lim, Teck Guan Lim, Michael Han Kim Kwong, Eva Wai Leong Ching
  • Patent number: 10381404
    Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a substrate having a buried insulator layer and an active layer overlying the buried insulator layer. A transistor overlies the buried insulator layer, and a memory cell underlies the buried insulator layer. As such, the memory cell and the transistor are on opposite sides of the buried insulator layer.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: August 13, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Bhushan Bharat, Juan Boon Tan, Danny Pak-Chum Shum, Yi Jiang, Wanbing Yi
  • Patent number: 10217794
    Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a capacitor, where the capacitor includes a first capacitor plate and a second capacitor plate. The first capacitor plate includes a first memory cell, and the second capacitor plate includes a second memory cell. The capacitor is utilized as a functional capacitor in the integrated circuit.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 26, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Juan Boon Tan, Mahesh Bhatkar, Bhushan Bharat, Wanbing Yi
  • Publication number: 20190043922
    Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a substrate having a buried insulator layer and an active layer overlying the buried insulator layer. A transistor overlies the buried insulator layer, and a memory cell underlies the buried insulator layer. As such, the memory cell and the transistor are on opposite sides of the buried insulator layer.
    Type: Application
    Filed: August 7, 2017
    Publication date: February 7, 2019
    Inventors: Bhushan Bharat, Juan Boon Tan, Danny Pak-Chum Shum, Yi Jiang, Wanbing Yi
  • Publication number: 20180351078
    Abstract: Shielded semiconductor devices and methods for fabricating shielded semiconductor devices are provided. An exemplary magnetically shielded semiconductor device includes a substrate having a top surface and a bottom surface. An electromagnetic-field-susceptible semiconductor component is located on and/or in the substrate. The magnetically shielded semiconductor device includes a top magnetic shield located over the top surface of the substrate. Further, the magnetically shielded semiconductor device includes a bottom magnetic shield located under the bottom surface of the substrate. Also, the magnetically shielded semiconductor device includes a sidewall magnetic shield located between the top magnetic shield and the bottom magnetic shield.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 6, 2018
    Inventors: Bhushan Bharat, Shan Gao, Danny Pak-Chum Shum, Wanbing Yi, Juan Boon Tan, Wei Yi Lim, Teck Guan Lim, Michael Han Kim Kwong, Eva Wai Leong Ching
  • Publication number: 20180342556
    Abstract: Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a capacitor, where the capacitor includes a first capacitor plate and a second capacitor plate. The first capacitor plate includes a first memory cell, and the second capacitor plate includes a second memory cell. The capacitor is utilized as a functional capacitor in the integrated circuit.
    Type: Application
    Filed: May 30, 2018
    Publication date: November 29, 2018
    Inventors: Juan Boon Tan, Mahesh Bhatkar, Bhushan Bharat, Wanbing Yi