Patents by Inventor Bhushan S. Asuri
Bhushan S. Asuri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9197161Abstract: The mixer of a transmit chain of a wireless transmitter (such as the transmitter of a cellular telephone handset) is driven with low third harmonic in-phase (I) and quadrature (Q) signals. The low third harmonic I and Q signals have three or more signal levels, and transition between the these three or more signal levels at times such that each of the I and Q signals approximates a sine wave and has minimal third harmonic spectral components. In one example, reducing the third harmonic components of the I and Q signals simplifies design of amplifier stages of the transmitter and helps reduce receive band noise.Type: GrantFiled: September 3, 2009Date of Patent: November 24, 2015Assignee: QUALCOMM IncorporatedInventors: Bhushan S. Asuri, Hongyan Yan
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Patent number: 8791740Abstract: A method for reducing average current consumption in a local oscillator (LO) path is disclosed. An LO signal is received at a master frequency divider and a slave frequency divider. Output from the master frequency divider is mixed with an input signal to produce a first mixed output. Output from the slave frequency divider is mixed with the input signal to produce a second mixed output. The second mixed output is forced to be in phase with the first mixed output.Type: GrantFiled: March 15, 2010Date of Patent: July 29, 2014Assignee: Qualcomm IncorporatedInventors: Dongjiang Qiao, Bhushan S. Asuri, Junxiong Deng, Frederic Bossu
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Patent number: 8633777Abstract: An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.Type: GrantFiled: December 1, 2009Date of Patent: January 21, 2014Assignee: QUALCOMM IncorporatedInventors: Zhang Jin, Aristotele Hadjichristos, Ockgoo Lee, Hongyan Yan, Guy Klemens, Maulin P. Bhagat, Thomas Myers, Norman L. Frederick, Junxiong Deng, Aleksandar Tasic, Bhushan S. Asuri, Mohammad Farazian
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Patent number: 8531219Abstract: A method of performing modulation of a data signal at a phase-locked loop (PLL) includes generating, at an upper frequency port of the PLL, a digital loop signal based at least in part on the data signal. The method further includes differentiating the digital loop signal to generate a digital input signal and converting the digital input signal to an analog current signal. A first feedback signal is generated based on the analog current signal. The method further includes generating, at a lower frequency port of the PLL, a second feedback signal based on the first feedback signal and further based on the data signal. According to further embodiments, apparatuses and a computer-readable medium are disclosed.Type: GrantFiled: April 19, 2013Date of Patent: September 10, 2013Assignee: QUALCOMM IncorporatedInventors: Jeremy D. Dunworth, Gary J. Ballantyne, Bhushan S. Asuri, Jifeng Geng, Gurkanwal S. Sahota
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Publication number: 20130229212Abstract: A method of performing modulation of a data signal at a phase-locked loop (PLL) includes generating, at an upper frequency port of the PLL, a digital loop signal based at least in part on the data signal. The method further includes differentiating the digital loop signal to generate a digital input signal and converting the digital input signal to an analog current signal. A first feedback signal is generated based on the analog current signal. The method further includes generating, at a lower frequency port of the PLL, a second feedback signal based on the first feedback signal and further based on the data signal. According to further embodiments, apparatuses and a computer-readable medium are disclosed.Type: ApplicationFiled: April 19, 2013Publication date: September 5, 2013Applicant: Qualcomm IncorporatedInventors: Jeremy D. Dunworth, Gary J. Ballantyne, Bhushan S. Asuri, Jifeng Geng, Gurkanwal S. Sahota
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Patent number: 8493126Abstract: An RF transmitter capable of transmitting over a wide range of frequencies includes a mixer, a wideband high-Q balun, a first driver amplifier and a second driver amplifier. The balun has a single primary winding and two secondary windings. A differential output of the mixer is coupled to the primary winding. A first of the two secondary windings is coupled to drive the first driver amplifier. A second of the two secondary windings is coupled to drive the second driver amplifier. One driver amplifier is used when transmitting at lower frequencies whereas the other driver amplifier is used when transmitting at higher frequencies. By appropriate sizing of the inductances of the secondary windings and by switching out one of the secondary windings at certain times, the balun is tunable to operate over the wide frequency range while having a high quality factor Q, thereby facilitating reduced power consumption while simultaneously meeting performance requirements.Type: GrantFiled: July 15, 2010Date of Patent: July 23, 2013Assignee: QUALCOMM IncorporatedInventors: Janakiram G. Sankaranarayanan, Bhushan S. Asuri, Vinod V. Panikkath, Hongyan Yan, Himanshu Khatri, Maulin Bhagat
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Patent number: 8446191Abstract: A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO).Type: GrantFiled: December 7, 2009Date of Patent: May 21, 2013Assignee: Qualcomm IncorporatedInventors: Jeremy D. Dunworth, Gary J. Ballantyne, Bhushan S. Asuri, Jifeng Geng, Gurkanwal S. Sahota
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Patent number: 8339165Abstract: A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.Type: GrantFiled: December 7, 2009Date of Patent: December 25, 2012Assignee: QUALCOMM IncorporatedInventors: Jeremy D. Dunworth, Gary J. Ballantyne, Bhushan S. Asuri
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Publication number: 20120013387Abstract: An RF transmitter capable of transmitting over a wide range of frequencies includes a mixer, a wideband high-Q balun, a first driver amplifier and a second driver amplifier. The balun has a single primary winding and two secondary windings. A differential output of the mixer is coupled to the primary winding. A first of the two secondary windings is coupled to drive the first driver amplifier. A second of the two secondary windings is coupled to drive the second driver amplifier. One driver amplifier is used when transmitting at lower frequencies whereas the other driver amplifier is used when transmitting at higher frequencies. By appropriate sizing of the inductances of the secondary windings and by switching out one of the secondary windings at certain times, the balun is tunable to operate over the wide frequency range while having a high quality factor Q, thereby facilitating reduced power consumption while simultaneously meeting performance requirements.Type: ApplicationFiled: July 15, 2010Publication date: January 19, 2012Applicant: QUALCOMM INCORPORATEDInventors: Janakiram G. Sankaranarayanan, Bhushan S. Asuri, Vinod V. Panikkath, Hongyan Yan, Himanshu Khatri, Maulin Bhagat
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Publication number: 20110133794Abstract: A phase locked loop (PLL) device includes a digital differentiator configured to differentiate a digital loop signal to at least partially compensate for the integration of an analog current signal by an analog integrator. A digital to analog converter (DAC) includes a current source output stage that generates the analog current signal based on an digital input signal. The analog integrator integrates the analog current signal to generate a voltage control signal for controlling a voltage controlled oscillator (VCO).Type: ApplicationFiled: December 7, 2009Publication date: June 9, 2011Applicant: QUALCOMM IncorporatedInventors: JEREMY D. DUNWORTH, GARY J. BALLANTYNE, BHUSHAN S. ASURI, JIFENG GENG, GURKANWAL S. SAHOTA
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Publication number: 20110133799Abstract: A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.Type: ApplicationFiled: December 7, 2009Publication date: June 9, 2011Applicant: QUALCOMM IncorporatedInventors: Jeremy D. Dunworth, Gary J. Ballantyne, Bhushan S. Asuri
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Publication number: 20110128084Abstract: An integrated circuit is described. The integrated circuit includes an inductor that has a large empty area in the center of the inductor. The integrated circuit also includes additional circuitry. The additional circuitry is located within the large empty area in the center of the inductor. The additional circuitry may include a capacitor bank, transistors, electrostatic discharge (ESD) protection circuitry and other miscellaneous passive or active circuits.Type: ApplicationFiled: December 1, 2009Publication date: June 2, 2011Applicant: QUALCOMM IncorporatedInventors: Jean Jin, Aristotele Hadjichristos, Ockgoo Lee, Hongyan Yan, Guy Klemens, Maulin P. Bhagat, Thomas Myers, Norman L. Frederick, Junxiong Deng, Aleksandar Tasic, Bhushan S. Asuri, Mohammad Farazian
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Publication number: 20110051838Abstract: The mixer of a transmit chain of a wireless transmitter (such as the transmitter of a cellular telephone handset) is driven with low third harmonic in-phase (I) and quadrature (Q) signals. The low third harmonic I and Q signals have three or more signal levels, and transition between the these three or more signal levels at times such that each of the I and Q signals approximates a sine wave and has minimal third harmonic spectral components. In one example, reducing the third harmonic components of the I and Q signals simplifies design of amplifier stages of the transmitter and helps reduce receive band noise.Type: ApplicationFiled: September 3, 2009Publication date: March 3, 2011Applicant: QUALCOMM IncorporatedInventors: Bhushan S. Asuri, Hongyan Yan
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Publication number: 20110012648Abstract: A method for reducing average current consumption in a local oscillator (LO) path is disclosed. An LO signal is received at a master frequency divider and a slave frequency divider. Output from the master frequency divider is mixed with an input signal to produce a first mixed output. Output from the slave frequency divider is mixed with the input signal to produce a second mixed output. The second mixed output is forced to be in phase with the first mixed output.Type: ApplicationFiled: March 15, 2010Publication date: January 20, 2011Applicant: QUALCOMM INCORPORATEDInventors: Dongjiang Qiao, Bhushan S. Asuri, Junxiong Deng, Frederic Bossu
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Patent number: 7142574Abstract: Described is a laser driver circuit to generate a bias current based, at least in part, upon a reference average power signal and a measured average power signal, and to generate a modulation current based, at least in part, upon a reference swing power and a measured swing power signal.Type: GrantFiled: May 21, 2003Date of Patent: November 28, 2006Assignee: Intel CorporationInventors: Bhushan S. Asuri, Ty Yoon
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Publication number: 20040233947Abstract: Described is a laser driver circuit to generate a bias current based, at least in part, upon a reference average power signal and a measured average power signal, and to generate a modulation current based, at least in part, upon a reference swing power and a measured swing power signal.Type: ApplicationFiled: May 21, 2003Publication date: November 25, 2004Inventors: Bhushan S. Asuri, Ty Yoon