Abstract: The present invention provides a calibration method applied to a DAC, wherein the calibration method includes the steps of: generating a first digital input signal to the DAC to generate a first analog signal; using an ADC to generate a first digital output signal according to the first analog signal; generating a second digital input signal to the DAC to generate a second analog signal; swapping a polarity of the second analog signal to generate a swapped signal; using the ADC to generate a second digital output signal according to the swapped signal; and generating a digital calibration signal according to the first digital output signal and the second digital output signal, to control a calibration circuit to generate an analog calibration signal or to determine a polarity direction of a DC offset that is to be calibrated.

Abstract: The present invention provides a calibration method applied to a DAC, wherein the calibration method includes the steps of: generating a first digital input signal to the DAC to generate a first analog signal; using an ADC to generate a first digital output signal according to the first analog signal; generating a second digital input signal to the DAC to generate a second analog signal; swapping a polarity of the second analog signal to generate a swapped signal; using the ADC to generate a second digital output signal according to the swapped signal; and generating a digital calibration signal according to the first digital output signal and the second digital output signal, to control a calibration circuit to generate an analog calibration signal or to determine a polarity direction of a DC offset that is to be calibrated.

Abstract: Disclosed is a successive approximation register (SAR) quantizer and a continuous-time sigma-delta modulator (CTSDM) using the SAR quantizer. The SAR quantizer is capable of generating M highly-significant bits as a digital output signal, and generating L lowly-significant bit(s) for the execution of noise shaping operation. Therefore, the SAR quantizer and the CTSDM can reduce the demand for the circuit area of a digital-to-analog converter and lower the delay of a critical path, so as to improve the performance and cut the cost.

Abstract: Disclosed is a successive approximation register (SAR) quantizer and a continuous-time sigma-delta modulator (CTSDM) using the SAR quantizer. The SAR quantizer is capable of generating M highly-significant bits as a digital output signal, and generating L lowly-significant bit(s) for the execution of noise shaping operation. Therefore, the SAR quantizer and the CTSDM can reduce the demand for the circuit area of a digital-to-analog converter and lower the delay of a critical path, so as to improve the performance and cut the cost.