Abstract: A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads.

Abstract: A high voltage tolerant transceiver operating at a low voltage is provided, including two input/output pads to receive a receive signal and transmit a transmit signal; a transmitter block to transmit the transmit signal; a receiver block to receive the receive signal and provide an amplified signal; at least one of the transmitter block and the receiver block further comprising at least two NMOS transistors having their gate coupled to a low power supply to receive the low voltage, their substrate coupled to ground, and their source coupled to the input/output pad. Also provided is a circuit to isolate the output of a transmitter from high voltages, including a first transistor and a second transistor. Also provided is a substrate isolating circuit, including a first transistor, a second transistor, and a third transistor so that the substrate voltage is isolated from a high voltage in the pads.

Abstract: A double cascode protected switchable voltage source may be used to selectively provide positive or negative voltage sources, for example, to a flash memory. The positive supply may be connected through a PMOS pass device to a first cascode protection device. A negative supply may be connected through an NMOS pass device and an NMOS cascode protection device to an output. The circuits may be designed so that exceeding snapback limits and gate aided drain breakdown are less likely.

Abstract: A double cascode protected switchable voltage source may be used to selectively provide positive or negative voltage sources, for example, to a flash memory. The positive supply may be connected through a PMOS pass device to a first cascode protection device. A negative supply may be connected through an NMOS pass device and an NMOS cascode protection device to an output. The circuits may be designed so that exceeding snapback limits and gate aided drain breakdown are less likely.