Patents by Inventor Biagio Giacalone

Biagio Giacalone has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6954743
    Abstract: An optimized method of computing the value of the degree of membership of a fuzzy variable defined within a universe of discourse that is discreted into a finite number of points by way of a membership function thereof, wherein the membership function is quantified into a finite number of levels corresponding to a finite number of degrees of truth, and is stored as a characteristic value of each subset of fuzzy variable values being all mirrored in one value of said degree of membership corresponding to one of said levels. The computing method includes generating a binary sequence; generating an address signal from the bits in the binary sequence; reading the contents of the memory storing the membership functions at each address signal to obtain a characteristic value; and comparing the characteristic value with the value of a fuzzy input variable.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: October 11, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone
  • Patent number: 6892188
    Abstract: For encoded membership functions used to identify atomic conditions defining antecedents of fuzzy inferences, and also for determining operands of the antecedents, corresponding stores are configured to store already available values of these encoded membership functions and of the operands. At the time of identification of a new value for the quantities, a check is made to see whether this value is already present in the corresponding store. If the outcome of this check is positive for encoded membership functions, pointers by which the encoded fuzzy inferences point to these functions is changed, so that the pointers are redirected towards the membership functions which are already stored. For operands of the antecedents, the check of the corresponding back-up store is carried out preferably based on the corresponding calculation values, the calculation of a new operand being disabled when the corresponding calculation parameters are already present in the corresponding back-up store.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: May 10, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone, Carmelo Palano
  • Patent number: 6862584
    Abstract: The calculation circuit comprises a subtracter having a first and a second input receiving a first and, respectively, a second input datum; a first output supplying a first output datum equal to the difference between the first and the second input datum; and a second output supplying a sign flag indicating the sign of the first output datum; an XOR logic gate having a first input receiving the sign flag, a second input receiving a first logic selection signal assuming a first level for the selection of the logical fuzzy union operation and a second level for the selection of the logical fuzzy intersection operation, and an output supplying a second logic selection signal; and a multiplexer having a first and a second datum input receiving the first and, respectively, the second input datum; a selection input receiving the second selection signal; and an output supplying a second output datum constituted by the first or the second input datum (A, B) as a function of the level assumed by the second selection s
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: March 1, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone, Francesco Mammoliti, Edmondo Gangi
  • Patent number: 6842744
    Abstract: A codifying and storing method for membership functions representing a membership degree of fuzzy variables defined within a universe of discourse which is discretized into a finite number of points is provided. The membership functions are quantized into a finite number of levels corresponding to a finite number of membership degrees and are stored by means of a characteristic value of each sub-set of values of fuzzy variables having for their image the same value of the membership degree corresponding to one of said levels. Also provided is a method for calculating the value of the membership degree of a fuzzy variable defined within a universe of discourse discretized into a finite number of points with reference to a membership function thereof, as well as to a circuit for calculating the membership degree of a fuzzy variable with reference to a membership function thereof.
    Type: Grant
    Filed: October 1, 2001
    Date of Patent: January 11, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone, Carmelo Marcello Palano, Claudio Luzzi, Francesca Grande
  • Publication number: 20020099673
    Abstract: A codifying and storing method for membership functions representing a membership degree of fuzzy variables defined within a universe of discourse which is discretized into a finite number of points is provided. The membership functions are quantized into a finite number of levels corresponding to a finite number of membership degrees and are stored by means of a characteristic value of each sub-set of values of fuzzy variables having for their image the same value of the membership degree corresponding to one of said levels. Also provided is a method for calculating the value of the membership degree of a fuzzy variable defined within a universe of discourse discretized into a finite number of points with reference to a membership function thereof, as well as to a circuit for calculating the membership degree of a fuzzy variable with reference to a membership function thereof.
    Type: Application
    Filed: October 1, 2001
    Publication date: July 25, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone, Carmelo Marcello Palano, Claudio Luzzi, Francesca Grande
  • Patent number: 6424957
    Abstract: Method and apparatus of parallel processing of multiple inference rules organized in fuzzy sets or logical functions of multiple fuzzy sets including membership functions defined in a so-called universe of discourse. The inference rules are configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication. The prepositions have at least one term of comparison between membership functions and a plurality of input data and each term is separated by logical operators. The method associates with the logical operators maximum and minimum operations among two or more elements and calculates exhaustively the overall degree of truth (&OHgr;) of a rule with a maximum or minimum of N partial truth levels. The method is accomplished by a plurality of identical, parallel inferential processors. Each inferential processor determines a preposition or a partial truth level of a preposition.
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: July 23, 2002
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Vincenzo Matranga, Biagio Giacalone, Massimo Abruzzese
  • Patent number: 6424958
    Abstract: The invention relates to a method of coding and storing fuzzy logic rules, and to a circuit architecture for processing such rules. The method provides for at least one inference rule of the IF/THEN type, having a predetermined number of antecedent parts of fuzzy variables and at least one consequent part, to be dismembered and stored into memory words to allow subsequent processing using logic operators of the AND/OR/NOT type. The coding of rules and variables is effected sequentially. Thus, the occupation of memory locations can be minimized. Specifically, the rules are coded through a multi-word description, such that the number of words coding each rule is a varying number dependent on the number of antecedent parts in the rule.
    Type: Grant
    Filed: December 22, 1997
    Date of Patent: July 23, 2002
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Francesco Pappalardo, Liliana Arcidiacono, Biagio Giacalone, Dario Di Bella
  • Publication number: 20020059149
    Abstract: For encoded membership functions used to identify the atomic conditions defining the antecedents of fuzzy inferences, and also for the determination of the operands of the antecedents, corresponding stores are configured for the storage of the already available values of these encoded membership functions and of the operands. At the time of identification of a new value for the quantities, a check is made to see whether this value is already present in the corresponding store. If the outcome of this check is positive, in the case of encoded membership functions, the mechanism by which the encoded fuzzy inferences point to these functions is changed, so that the pointers of the encoded fuzzy inferences are redirected towards the membership functions which are already stored.
    Type: Application
    Filed: February 7, 2001
    Publication date: May 16, 2002
    Inventors: Francesco Pappalardo, Biagio Giacalone, Carmelo Palano
  • Patent number: 6385598
    Abstract: A fuzzy processor with an improved architecture. The fuzzy processor includes a fuzzy rule processor, an internal fuzzy instruction memory, an internal knowledge base memory, an arithmetic-logic unit, a control unit that can execute non-fuzzy instructions that are typical of conventional microprocessors, and an internal memory for storing the non-fuzzy instructions. The improved fuzzy processor architecture has an ability to load other knowledge bases and other fuzzy rules from outside the processor concurrently and transparently with respect to instruction processing. The processor can also process both fuzzy instructions and non-fuzzy instructions, can perform conditional and unconditional jumps within a set of fuzzy rules that are being processed, and can conditionally swap the knowledge base or the set of rules that are to be processed.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: May 7, 2002
    Assignee: Consorzio per la Ricerca Sulla Microeleti Nel Mezzogiorno
    Inventors: Biagio Giacalone, Francesco Pappalardo, Enrico Pelos, Vincenzo Catania
  • Publication number: 20020052857
    Abstract: An optimized method of computing the value of the degree of membership of a fuzzy variable defined within a universe of discourse that is discreted into a finite number of points by way of a membership function thereof, wherein the membership function is quantified into a finite number of levels corresponding to a finite number of degrees of truth, and is stored as a characteristic value of each subset of fuzzy variable values being all mirrored in one value of said degree of membership corresponding to one of said levels. The computing method includes generating a binary sequence; generating an address signal from the bits in the binary sequence; reading the contents of the memory storing the membership functions at each address signal to obtain a characteristic value; and comparing the characteristic value with the value of a fuzzy input variable.
    Type: Application
    Filed: October 1, 2001
    Publication date: May 2, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco Pappalardo, Biagio Giacalone
  • Publication number: 20010039538
    Abstract: The calculation circuit comprises a subtracter having a first and a second input receiving a first and, respectively, a second input datum; a first output supplying a first output datum equal to the difference between the first and the second input datum; and a second output supplying a sign flag indicating the sign of the first output datum; an XOR logic gate having a first input receiving the sign flag, a second input receiving a first logic selection signal assuming a first level for the selection of the logical fuzzy union operation and a second level for the selection of the logical fuzzy intersection operation, and an output supplying a second logic selection signal; and a multiplexer having a first and a second datum input receiving the first and, respectively, the second input datum; a selection input receiving the second selection signal; and an output supplying a second output datum constituted by the first or the second input datum (A, B) as a function of the level assumed by the second selection s
    Type: Application
    Filed: November 29, 2000
    Publication date: November 8, 2001
    Inventors: Francesco Pappalardo, Biagio Giacalone, Francesco Mammoliti, Edmondo Gangi
  • Patent number: 6075338
    Abstract: Driving of a three-phase motor includes controlling the slip of the motor by way of a fuzzy logic algorithm. The simplicity and precision of the fuzzy control of the slip permits dynamically optimizing the efficiency of a three-phase motor under any operating condition, and thereby minimizing power consumption. The control is carried out by knowing: the effective speed of the motor that represents the feedback value, and that may be provided by a common encoder (typically a dynamo or an optic device) keyed on the motor's spindled; the stator frequency imposed on the motor; the required speed; and, of course, the characteristic curve (frequency-torque) of the motor.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: June 13, 2000
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Ettore Mazza, Biagio Russo, Biagio Giacalone, Jean-Marie Bourgeois
  • Patent number: 5952874
    Abstract: A transistor threshold extraction circuit having an output and including a first and a second transistor of the same type each having a control terminal and having essentially the same threshold voltage, the control terminal of the first transistor being connected to a constant potential node, a current mirror having at least one input terminal and one output terminal coupled respectively to said first and second transistors to provide bias currents, a first and a second potential reference, and a voltage divider having an intermediate tap and first and second end terminals. The control terminal of the second transistor is coupled to the intermediate tap and the divider is biased by coupling the first and the second end terminals respectively to the first and second potential references. The output is coupled to one of said end terminals.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: September 14, 1999
    Assignee: Consorzio per la Ricerca sulla Microeletrronica nel Mezzogiorno
    Inventors: Nicolo Manaresi, Eleonora Franchi, Dario Bruno, Biagio Giacalone
  • Patent number: 5943664
    Abstract: Memory and storage method in an electronic controller operating with fuzzy logic procedures for membership functions (FA) of logical variables (M) defined in a so-called discourse universe (U) discretized at a finite number of points (m) which provide memorization of triangular or trapezoid membership functions (FA). Memory words have a first portion for codification of the vertex of the membership function (FA), a second portion for a codification corresponding to the slope of one side of the membership function (FA), and a third portion for a codification corresponding to the slope of the other side of the function.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: August 24, 1999
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Massimo Abruzzese, Biagio Giacalone
  • Patent number: 5825229
    Abstract: A voltage level shift circuit has a first input receiving a first voltage signal and a second input receiving a second voltage signal. The voltage level shift circuit is structured to generate an output voltage at an output terminal which is equal to a sum of the first and second voltage signals. The first voltage signal may be varied to vary a shift of the second voltage signal.
    Type: Grant
    Filed: January 31, 1996
    Date of Patent: October 20, 1998
    Assignee: Co. Ri. M.Me--Consorzio Per la Ricera Sulla Microelectronica Nel Mezzogiorno
    Inventors: Nicolo Manaresi, Eleonora Franchi, Dario Bruno, Biagio Giacalone, Vincenzo Matranga
  • Patent number: 5806051
    Abstract: Analog processor of antecedent parts of fuzzy logic inference rules and comprising a plurality of analog generators of membership function each having an output supplying a value corresponding to a degree of truth complemented to one (.alpha.') of logical assignments of the type (A is A') with the outputs being connected together to form a common circuit node and also connected to a current generator and the processor comprising also a voltage control device inserted between a supply voltage pole and a ground voltage reference and a one-way element connected to the common circuit node and the one-way element having an output producing an overall degree of truth for the antecedent part of the fuzzy rule to be processed.
    Type: Grant
    Filed: October 31, 1995
    Date of Patent: September 8, 1998
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Dario Bruno, Biagio Giacalone, Nicolo Manaresi
  • Patent number: 5796917
    Abstract: Method and apparatus of parallel processing of multiple inference rules organized in fuzzy sets or logical functions of multiple fuzzy sets including membership functions defined in a so-called universe of discourse. The inference rules are configured essentially as IF-THEN rules with at least one antecedent preposition and at least one consequent implication. The prepositions have at least one term of comparison between membership functions and a plurality of input data and each term is separated by logical operators. The method associates with the logical operators maximum and minimum operations among two or more elements and calculates exhaustively the overall degree of truth (.OMEGA.) of a rule with a maximum or minimum of N partial truth levels. The method is accomplished by a plurality of identical, parallel inferential processors. Each inferential processor determines a preposition or a partial truth level of a preposition.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: August 18, 1998
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Vincenzo Matranga, Biagio Giacalone, Massimo Abruzzese
  • Patent number: 5710867
    Abstract: A method and system for processing a plurality of fuzzy logic rules. The system includes a plurality of fuzzy logic lines, each fuzzy logic line corresponding to one of the fuzzy logic rules and including a calculating device. Each calculating device has an input terminal for receiving a series of weights and an output terminal for outputting an overall truth value according to the received series of weights and at least one logical operator of the fuzzy logic rule corresponding to the fuzzy logic line. The system further includes processing circuitry coupled to each fuzzy logic line, for receiving the overall truth value from each line, and outputting a fuzzy logic value according to the received overall truth values.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: January 20, 1998
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Biagio Giacalone, Vincenzo Catania, Claudio Luzzi, Vincenzo Matranga
  • Patent number: 5672960
    Abstract: A transistor threshold extraction circuit including at least two transistors of the same type each having a control terminal and having essentially a same threshold voltage, each of the two transistors also having first and second main conduction terminals, a current mirror circuit having at least two input-output terminals with the two terminals coupled respectively to the two transistors so as to supply bias currents, a voltage generator connected between the two control terminals, and a feedback path between the control terminals and one of the input-output terminals. An output of the extraction circuit is coupled to one of the control terminals.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: September 30, 1997
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Nicolo Manaresi, Antonio Gnudi, Dario Bruno, Biagio Giacalone
  • Patent number: 5615303
    Abstract: Circuit for calculation of values of membership functions in a controller operating with fuzzy logic procedures. The membership functions are of triangular or trapezoidal form and are defined in a so-called discourse universe discretized in a finite number of points. The controller includes a central control unit equipped with a memory section for storage of said membership functions, a microprocessor, and an interface. The membership functions are stored by means of a codification of the coordinate of the vertex and the slopes at the sides of the vertex. The circuit includes a calculator connected to the memory section, the microprocessor, and the interface, to determine the value of each membership functions at each point of the discourse universe using the stored vertex and slopes.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: March 25, 1997
    Assignee: Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Massimo Abruzzese, Biagio Giacalone