Patents by Inventor Biao Zhang

Biao Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040087761
    Abstract: The present invention involves a novel polycarbazole, more specifically, a polycarbazole, of which repeating unit is a formula 1
    Type: Application
    Filed: November 1, 2002
    Publication date: May 6, 2004
    Inventors: Michiya Fujiki, Charles E. Mckenna, Zhong-Biao Zhang
  • Publication number: 20040075769
    Abstract: A video system and method for combining multiple video signals on a single display is provided. The video system includes a video processor to process a second video signal and generate a processed video signal. The processed video signal has the same resolution and scan rates as a first video signal. A multiplexer is used to selectively display either the processed video signal or the first video signal on a display.
    Type: Application
    Filed: October 18, 2002
    Publication date: April 22, 2004
    Inventors: Shing-Jong Shy, Biao Zhang
  • Publication number: 20030134352
    Abstract: Disclosed herein are novel compositions and methods for enhancing the solubility and promoting the adoption of native folding conformation of a protein or polypeptide expressed by recombinant DNA techniques. One embodiment of the present invention relates to a protein or polypeptide of interest is modified through either carboxyl- or amino-terminal peptide extension, so as to promote folding within host cells. Another embodiment relates to a method for enhancing the in vitro renaturation of a protein or polypeptide of interest expressed by recombinant DNA techniques, in circumstances where, following expression, a substantial percentage of the expressed protein or polypeptide of interest is localized within inclusion bodies.
    Type: Application
    Filed: January 4, 2002
    Publication date: July 17, 2003
    Inventors: Paul I. Freimuth, Yian-Biao Zhang, Jason A. Howitt
  • Publication number: 20030007099
    Abstract: A method and system of noise filtering is provided. The pixels of a first filter mask are separated into groups based on luminance. . . . The sizes of each group is determined and a largest group is selected. The distance of each group of pixels from the largest group is also calculated. Pixels in groups that are small compared to the largest group and far from the largest group are tagged as noisy. After tagging the noisy pixels, additional filtering can be applied to the pixels of first filter mask without degradation from the tagged pixels.
    Type: Application
    Filed: June 19, 2001
    Publication date: January 9, 2003
    Inventors: Biao Zhang, Jin Ji
  • Patent number: 6452592
    Abstract: A method and circuit generates a sampling clock signal that digitizes an analog video signal. The sampling clock signal is generated by a clock divider coupled to the horizontal synchronization signal of the analog video signal. A divisor calculator calculates a divisor for the clock divider to control the frequency of the sampling clock signal. Specifically, the divisor calculator selects an initial divisor for the clock divider. Then the divisor calculator calculates a new divisor based on the target pixel value provided by a mode detector and the measured pixel value from a counter. Some embodiments of the present invention provides fine tuning of the frequency by testing other possible divisors with a plurality of different phases. In addition, some embodiments of the present invention calibrate the phase of the sampling clock signal to generate a phase shifted sampling clock signal.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: September 17, 2002
    Assignee: SmartASIC, Inc.
    Inventors: Biao Zhang, Chin-Cheng Kau
  • Publication number: 20010055009
    Abstract: A method and circuit generates a sampling clock signal that digitizes an analog video signal. The sampling clock signal is generated by a clock divider coupled to the horizontal synchronization signal of the analog video signal. A divisor calculator calculates a divisor for the clock divider to control the frequency of the sampling clock signal. Specifically, the divisor calculator selects an initial divisor for the clock divider. Then the divisor calculator calculates a new divisor based on the target pixel value provided by a mode detector and the measured pixel value from a counter. Some embodiments of the present invention provides fine tuning of the frequency by testing other possible divisors with a plurality of different phases. In addition, some embodiments of the present invention calibrate the phase of the sampling clock signal to generate a phase shifted sampling clock signal.
    Type: Application
    Filed: May 21, 2001
    Publication date: December 27, 2001
    Applicant: SmartASIC, Inc.
    Inventors: Biao Zhang, Chin-Cheng Kau
  • Patent number: 6310618
    Abstract: A method and circuit generates a sampling clock signal that digitizes an analog video signal. The sampling clock signal is generated by a clock divider coupled to the horizontal synchronization signal of the analog video signal. A divisor calculator calculates a divisor for the clock divider to control the frequency of the sampling clock signal. Specifically, the divisor calculator selects an initial divisor for the clock divider. Then the divisor calculator calculates a new divisor based on the target pixel value provided by a mode detector and the measured pixel value from a counter. Some embodiments of the present invention fine tune the frequency by testing other possible divisors with a plurality of different phases. In addition, some embodiments of the present invention calibrate the phase of the sampling clock signal to generate a phase shifted sampling clock signal.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: October 30, 2001
    Assignee: SmartASIC, Inc.
    Inventors: Biao Zhang, Chin-Cheng Kau