Patents by Inventor Bibhu Prasad Das

Bibhu Prasad Das has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240039554
    Abstract: An apparatus includes a delta-sigma modulator digital-to-analog converter section having a multiple stag cascaded error cancellation architecture, each stage including a delta-sigma modulator followed by a digital-to-analog converter, the delta-sigma modulator digital-to-analog converter section configured to receive a digital input and to generate an analog output. An inverting amplifier-based analog filter is coupled to receive the analog output, the inverting amplifier-based analog filter configured to filter the analog output to produce a filtered analog output.
    Type: Application
    Filed: July 29, 2022
    Publication date: February 1, 2024
    Inventors: Bibhu Prasad Das, Romesh Kumar Nandwana, Richard Van Hoesen Booth, Pavan Kumar Hanumolu, Kadaba Lakshmikumar
  • Patent number: 11249499
    Abstract: A system includes a transimpedance amplifier, disposed on a chip, having a front-end section and a back-end section; an on-chip linear regulator, on the chip, arranged to power the front-end section; and an off-chip switching regulator, off the chip, arranged to power the back-end section. The arrangement provides low noise power supply for the front-end section, while providing a more power efficient switching regulator to power the back-end section. The output voltage of the on-chip linear regulator and the output voltage of the off-chip switching regulator are controlled to be the same.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: February 15, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Alexander Kurylak, Bibhu Prasad Das, Kadaba Lakshmikumar
  • Publication number: 20210278869
    Abstract: A system includes a transimpedance amplifier, disposed on a chip, having a front-end section and a back-end section; an on-chip linear regulator, on the chip, arranged to power the front-end section; and an off-chip switching regulator, off the chip, arranged to power the back-end section. The arrangement provides low noise power supply for the front-end section, while providing a more power efficient switching regulator to power the back-end section. The output voltage of the on-chip linear regulator and the output voltage of the off-chip switching regulator are controlled to be the same.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 9, 2021
    Inventors: Alexander Kurylak, Bibhu Prasad Das, Kadaba Lakshmikumar