Abstract: An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.

Abstract: An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.

Abstract: An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.

Abstract: An integrated circuit die and/or package. An apparatus is described having a substrate with a central region and an outer region. A first plurality of electrical connections is spaced apart by a first distance on the outer region of the substrate. A second plurality of electrical connections is spaced apart by a second distance, smaller than the first distance, on the central region of the substrate.

Abstract: A multi-layer integrated circuit package which contains layers of dielectric that substantially reduce metal migration between the metal conductors of the package. The package has metal baseplates that are separated from a lead frame by a plurality of dielectric tapes. The integrated circuit is mounted to the baseplate which has a plurality of tabs that are connected to the lead frame of the package. The power or ground leads of the package are bonded to the corresponding baseplate through the tabs of the metal plate. The lead frame, metal baseplate and dielectric tapes all have center openings to provide clearance for the integrated circuit. The center opening of the tapes are such that the dielectric material extends beyond the ends of the baseplates and lead frame.

Abstract: An overmolded plastic integrated circuit package which contains an integrated circuit that is mounted to a first surface of a printed circuit board. The integrated circuit is electrically coupled to a plurality of external contacts located on an opposite second surface of the printed circuit board. The integrated circuit is encapsulated and protected by a molded plastic compound. The printed circuit board has slots that receive a portion of the molded plastic material. The plastic filled slots anchor the outer encapsulant to the printed circuit board and prevent delamination between the interface of the circuit board and the adjacent encapsulant material.

Abstract: An electronic package which contains a tantalum oxide capacitor that couples a conductive bottom surface of an integrated circuit to a plurality of conductive lines within the housing of the package. The conductive lines are connected to pins which provide power and ground to the integrated circuit. The pins and conductive lines are also coupled to a number of junctions located on the top surface of the die, by a plurality of wires. The package couples both the top and bottom surfaces of the integrated circuit to the power and ground pins of the package.

Abstract: A thermally dissipative IC package which can accommodate large discrete capacitors. The package substrate incorporates a recessed region on one of its surfaces which is separate from the region in which the IC device is placed. Inside this recessed region is placed a discrete capacitor such that the entire capacitor resides below the surface of the substrate within the recessed region. Finally, a metal plate is attached to the surface of the substrate, unencumbered by the discrete capacitor.

Abstract: A thermally dissipative IC package which can accommodate large discrete capacitors. The package substrate incorporates a recessed region on one of its surfaces which is separate from the region in which the IC device is placed. Inside this recessed region is placed a discrete capacitor such that the entire capacitor resides below the surface of the substrate within the recessed region. Finally, a metal plate is attached to the surface of the substrate, unencumbered by the discrete capacitor.

Abstract: A method and resulting structure for constructing an IC package utilizing thin film technology. The package has a bottom conductive plate that has a layer of ceramic vapor deposited onto the plate in a predetermined pattern. Adjacent to the insulative layer of ceramic is a layer of conductive metal vapor deposited onto the ceramic. The layer of metal can be laid down onto the ceramic in a predetermined pattern to create a power plane, a plurality of signal lines, or a combination of power planes and signal lines. On top of the layer of conductive material is a lead frame separated by a layer of insulative polyimide material. The polyimide material has a plurality of holes filled with a conductive material, which electrically couple the layer of conductive material with the leads of the lead frame.

Abstract: A test assembly for testing integrated circuits. The assembly includes a test chip that is located between the integrated circuit (IC) and a tester. The test chip has a very low input capacitance that approximates an open circuit, and has an impedance that matches the impedance of the integrated circuit and tester. The matching impedance of the test chip reduces the amount of signal ringing between the integrated circuit and tester.

Abstract: An electronic package for an integrated circuit. The integrated circuit is mounted to a heat spreader that is attached to a substrate. The heat spreader is thermally conductive and lowers the thermal impedance of the package. The heat spreader may also provide a return current path from the integrated circuit to the substrate. The substrate has internal power and signal lines that are coupled to the integrated circuit. The power and signal lines are connected to surface pads or leads that can be mounted to an external printed circuit board. Mounted to an inner area of the integrated circuit is a decoupling capacitor. The decoupling capacitor is also connected to a lid that is mounted to the substrate. The decoupling capacitor reduces the noise within the integrated circuit and is used to control the impedance of the overall package. The lid contains both power and ground planes that are connected to the capacitor and the power/ground pins of the substrate.

Abstract: An integrated circuit device having an array of flexible leads attached to the bottom of an integrated circuit package. There is provided a sheet of electrically conductive material. A plurality of slots are punched into the sheet, such that there is formed a plurality of beams. The beams are then bent into a spring shape. The sheet is placed over an integrated circuit package which has an array of contact pads extending across a bottom surface of the package. The beams are aligned and attached to the contact pads. The beams are then cut and separated from the remainder of the sheet. The sheet is removed, wherein there is constructed an integrated circuit package that has a two dimensional array of flexible leads.

Abstract: A high capacitance/low inductance capacitor module. The module comprises a plurality of conductive power planes that are separated from a plurality of conductive ground planes by layers of dielectric material. The power planes each have opposite extending tabs that are offset from similar tabs extending from the ground planes and which are coupled together by layers of conductive material. Likewise, the tabs of the ground planes are coupled together by additional layers of conductive material. The corresponding power and ground planes are also coupled together by vias located throughout the module. The conductive layers couple both sides of the corresponding conductive planes and provide contact pads for further assembly to a semiconductive die. The module is attached to the semiconductive die by a plurality of gold bumps which are formed on the top surface of the die.

Abstract: A test apparatus that electrically couples a semiconductor package with a test board. The apparatus has a plurality of first contacts that engage the leads of the package. The first contacts are attached to a housing which has four grounding rods spaced a predetermined distance from the first contacts. The rods are electrically grounded and absorb the inductive fields generated by the first contacts in contact with the power and ground leads of the package. The rods extend around the package to control the inductance of the first contacts of the apparatus. The test apparatus may also have a circuit board connected to the first contacts by a plurality of second contacts. A number of spring biased pins are incorporated to couple the circuit board to the test board. The circuit board has both power and ground planes that are coupled to the power and ground leads of the package. The circuit board decouples the power and ground leads and controls the capacitance of the first contacts of the apparatus.

Abstract: A method for attaching an array of flexible leads to the bottom of an integrated circuit package. There is provided a sheet of electrically conductive material. A plurality of slots are punched into the sheet, such that there is formed a plurality of beams. The beams are then bent into a spring shape. The sheet is placed over an integrated circuit package which has an array of contact pads extending across a bottom surface of the package. The beams are aligned and attached to the contact pads. The beams are then cut and separated from the remainder of the sheet. The sheet is removed, wherein there is constructed an integrated circuit package that has a two dimensional array of flexible leads.

Abstract: An alumina multilayer wiring substrate having a high dielectric, low inductance capacitor in the substrate on which a VLSI is to be mounted to effectively eliminate electrical noise(s) which may hinder the operation of the VLSI at high speed (frequency) is provided.

Abstract: A multi-layered molded plastic package for encapsulating an integrated circuit is described. The package includes a carrier having a double-layered metal plate which are separated by an adhesive coated insulation tape. A second insulating tape layer is used to bond externally extending leads onto one of the metal plates. Power and ground connections from the terminals of the integrated circuit are made to each of the plates, respectively, as are the power and ground lead connections to the two plates. The power and ground planes remove the requirement for direct physical connection between the power and ground terminals of the integrated circuit and their respective leads.

Abstract: A multi-layered molded plastic package for encapsulating an integrated circuit is described. The package includes a carrier having a double-layered metal plate which are separated by an adhesive coated insulation tape. A second insulating tape layer is used to bond externally extending leads onto one of the metal plates. Power and ground connections from the terminal of the integrated circuit are made to each of the plates, respectively, as are the power and ground lead connections to the two plates. The power and ground planes remove the requirement for direct physical connection between the power and ground terminals of the integrated circuit and their respective leads.

Abstract: An improved method for eutectically bonding a silicon wafer onto a gold preform is described. A gold/silicon seed is placed on a pure gold preform. Then a die is placed onto the pure gold preform and the gold/silicon seed, wherein the seed acts as a catalyst to form an eutectic bond.