Abstract: An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.

Abstract: The present invention provides an image sensor which comprises improved microlenses to cope with different optical requirements for oblique incident light or different components of light. In one embodiment, the image sensor comprises at least two microlenses having different radii of curvature. In another embodiment, the image sensor comprises at least one asymmetrical microlens.

Abstract: An exemplary wafer level package comprises a semiconductor wafer with a plurality of semiconductor chips of perfect polygonal shapes thereon. A circuit-free area is defined over the semiconductor wafer to electrically isolate the semiconductor chips. A dam structure is substantially formed over the circuit-free area, wherein a portion of the dam structure formed around an edge of the semiconductor wafer is formed with a plurality via holes therein. A transparent substrate is formed over the semiconductor wafer, defining a plurality of cavities between the semiconductor chips and the transparent substrate, wherein the transparent substrate is supported by the dam structure.

Abstract: The present invention provides an image sensor which comprises improved microlenses to cope with different optical requirements for oblique incident light or different components of light. In one embodiment, the image sensor comprises at least two microlenses having different radii of curvature. In another embodiment, the image sensor comprises at least one asymmetrical microlens.

Abstract: The present invention provides an image sensor which comprises improved microlenses to cope with different optical requirements for oblique incident light or different components of light. In one embodiment, the image sensor comprises at least two microlenses having different radii of curvature. In another embodiment, the image sensor comprises at least one asymmetrical microlens.

Abstract: Multi-microlens arrays for optimizing light collection efficiency in CCD/CMOS solid-state color image cameras with L-shaped or non-regular photodetector areas are disclosed. Microelectronic fabrication methods for forming planar array multi-microlenses comprised of elements consisting of lens-pairs, integrated with color-filters, and compatible with CMOS high-volume manufacturing are taught. Experimental results demonstrating the processes for fabrication of multi-microlenses for L-shaped and for non-regular sensing areas are given.

Abstract: A microelectronic method is described for optimizing the fabrication of optical and semiconductor array structures for high efficiency color image formation in solid-state cameras. Disclosed is an ordered fabrication sequence in which microlens formation precedes color filter layer formation to enable increased image light collection efficiency, to encapsulate and protect the microlens elements from chemical and thermal processing damage, to minimize topographical underlayer variations which would axially misalign or otherwise aberrate microlens elements formed on non-planar surfaces, and, to complete the most difficult steps early in the process to minimize rework and scrap. A CMOS, CID, or CCD optoelectronic configuration is formed by photolithographically patterning a planar-array of photodiodes on a Silicon or other III-V, II-VI, or compound semiconductor substrate.

Abstract: A microelectronic method is described for optimizing the fabrication of optical and semiconductor array structures for high efficiency color image formation in solid-state cameras. Disclosed is an ordered fabrication sequence in which microlens formation precedes color filter layer formation to enable increased image light collection efficiency, to encapsulate and protect the microlens elements from chemical and thermal processing damage, to minimize topographical underlayer variations which would axially misalign or otherwise aberrate microlens elements formed on non-planar surfaces, and, to complete the most difficult steps early in the process to minimize rework and scrap. A CMOS, CID, or CCD optoelectronic configuration is formed by photolithographically patterning a planar-array of photodiodes on a Silicon or other III-V, II-VI, or compound semiconductor substrate.