Patents by Inventor Biju MANAKKAM VEETIL

Biju MANAKKAM VEETIL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory circuit architecture
    Patent number: 11908537
    Abstract: A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: February 20, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: David Li, Rahul Biradar, Biju Manakkam Veetil, Po-Hung Chen, Ayan Paul, Sung Son, Shivendra Kushwaha, Ravindra Reddy Chekkera, Derek Yang
  • MEMORY CIRCUIT ARCHITECTURE
    Publication number: 20230178118
    Abstract: A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.
    Type: Application
    Filed: February 1, 2023
    Publication date: June 8, 2023
    Inventors: David LI, Rahul BIRADAR, Biju MANAKKAM VEETIL, Po-Hung CHEN, Ayan PAUL, Sung SON, Shivendra KUSHWAHA, Ravindra Reddy CHEKKERA, Derek YANG
  • Memory circuit architecture
    Patent number: 11600307
    Abstract: A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: March 7, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: David Li, Rahul Biradar, Biju Manakkam Veetil, Po-Hung Chen, Ayan Paul, Sung Son, Shivendra Kushwaha, Ravindra Reddy Chekkera, Derek Yang
  • MEMORY CIRCUIT ARCHITECTURE
    Publication number: 20220208232
    Abstract: A semiconductor device includes: a memory circuit having a plurality of quadrants arranged at corners of the memory circuit and surrounding a bank control component; wherein a first quadrant of the plurality of quadrants includes a first bit cell core and a first set of input output circuits configured to access the first bit cell core, the first quadrant defined by a rectangular boundary that encloses portions of two perpendicular edges of the memory circuit; wherein a second quadrant of the plurality of quadrants includes a second bit cell core and a second set of input output circuits configured to access the second bit cell core, the second quadrant being adjacent the first quadrant, wherein a border between the first quadrant and the second quadrant defines a first axis about which the first quadrant and the second quadrant are symmetrical.
    Type: Application
    Filed: December 29, 2020
    Publication date: June 30, 2022
    Inventors: David LI, Rahul BIRADAR, Biju MANAKKAM VEETIL, Po-Hung CHEN, Ayan PAUL, Sung SON, Shivendra KUSHWAHA, Ravindra Reddy CHEKKERA, Derek YANG