Abstract: An apparatus for holding electrical components and a method for securing electrical components therein, wherein the apparatus includes a major plane, a top side and a bottom side, each parallel to the major plane, and a plurality of recesses in the top side. A depth of each of the plurality of recesses is based on the bottom side. Each respective recess includes a plurality of mounting moles, wherein each mounting hole is configured to accommodate a respective size of an electrical component, and oriented differently from others of the plurality of mounting holes.

Abstract: This application is directed to packaging technology for providing an electronic device (e.g., a memory device). A memory device includes a stack of memory chips, a device substrate, and a conductive wire. The stack of memory chips includes a first memory chip having a chip pad that is formed on a surface of the first memory chip. The device substrate includes a plurality of substrate pads formed on a front surface of the device substrate. The front surface has a front opening, and the device substrate receives the stack of memory chips via the front opening of the front surface. The conductive wire is coupled to the front surface and the stack of memory chips, and is configure to couple the chip pad and one of the substrate pads electrically. In some embodiments, the device substrate includes a cutout opening that goes through an entire thickness of the device substrate.

Abstract: This application is directed to controlling underfill bleed-out in semiconductor packaging. A first substrate is disposed on a support substrate, and a bracket structure is placed on the support substrate with a first separation from the first substrate. An underfill material is applied on the support substrate. The bracket structure automatically controls bleed-out of the underfill material. In some embodiments, in accordance with a determination that the underfill material is substantially hardened, the bracket structure is removed from the support substrate. In some embodiments, the first substrate includes a semiconductor package, and the support substrate includes a printed circuit board (PCB). Alternatively, in some embodiments, the first substrate includes a chip, and the support substrate includes a semiconductor package and forms a system in a package (SiP) with the first substrate.

Abstract: A device includes a single-sided printed circuit board with an opening and a double-sided printed circuit board. The single-sided printed circuit board includes a first and a second side and has an opening extending from the first side. The double-sided printed circuit board is arranged and affixed in the opening of the single-sided printed circuit board, and components extending from one of the sides of the double-sided printed circuit board protrude into the opening but do not protrude beyond the second surface of the single-sided printed circuit board.

Abstract: Embodiments disclosed herein include wire bonds and tools for forming wire bonds. In an embodiment, a wire bond may comprise a first attachment ball, and a first wire having a first portion contacting the first attachment ball and a second portion. In an embodiment, the wire bond may further comprise a second attachment ball, and a second wire having a first portion contacting the second attachment ball and a second portion. In an embodiment, the second portion of the first wire is connected to the second portion of the second wire.

Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate and at least one microelectronic device, which is separate from the microelectronic die stack, attached to the microelectronic substrate within the footprint of one of the microelectronic dice within the microelectronic die stack. In one embodiment, the microelectronic die stack may have a plurality of stacked microelectronic dice, wherein one microelectronic die of the plurality of microelectronic dice has a footprint greater than the other microelectronic die of the plurality of microelectronic dice, and wherein the at least one microelectronic device is attached to the one microelectronic die of the plurality of microelectronic dice having the greater footprint.

Abstract: Embodiments include systems in packages (SiPs) and a method of forming the SiPs. A SiP includes a package substrate and a first modularized sub-package over the package substrate, where the first modularized sub-package includes a plurality of electrical components, a first mold layer, and a redistribution layer. The SiP also includes a stack of dies over the package substrate, where the first modularized sub-package is disposed between the stack of dies. The SiP further includes a plurality of interconnects coupled to the stack of dies, the first modularized sub-package, and the package substrate, wherein the redistribution layer of the first modularized sub-package couples the stack of dies to the package substrate with the plurality of interconnects. The SiP may enable the redistribution layer of the first modularized sub-package to couple the electrical components to the stacked dies and the package substrate without a solder interconnect.

Abstract: Embodiments disclosed herein include electronics packages and methods of forming such packages. In an embodiment, the electronics package comprises a first substrate and a plurality of first conductive pads on the first substrate. In an embodiment, the electronics package further comprises a second substrate and a plurality of second conductive pads on the second substrate. In an embodiment, the electronics package further comprises a plurality of interconnects between the first and second substrate. In an embodiment, each interconnect electrically couples one of the first conductive pads to one of the second conductive pads. In an embodiment, the interconnects comprise strands of conductive material that are woven on themselves to form a mesh-like structure.

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.

Abstract: Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.

Abstract: Electronic device package technology is disclosed. In one example, an electronic device includes a substrate having a bond finger, a die coupled to the substrate and having a bond pad, a first bond wire coupled between the bond pad and the bond finger, and a second bond wire coupled between the bond pad and the bond finger. The first bond wire is reverse bonded between a pad solder ball on the bond pad and a finger solder ball on the bond finger. The second bond wire is forward bonded between a supplemental pad solder ball on the pad solder and the bond finger adjacent the finger solder ball. Associated systems and methods are also disclosed.

Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate and at least one microelectronic device, which is separate from the microelectronic die stack, attached to the microelectronic substrate within the footprint of one of the microelectronic dice within the microelectronic die stack. In one embodiment, the microelectronic die stack may have a plurality of stacked microelectronic dice, wherein one microelectronic die of the plurality of microelectronic dice has a footprint greater than the other microelectronic die of the plurality of microelectronic dice, and wherein the at least one microelectronic device is attached to the one microelectronic die of the plurality of microelectronic dice having the greater footprint.

Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate and at least one microelectronic device, which is separate from the microelectronic die stack, attached to the microelectronic substrate within the footprint of one of the microelectronic dice within the microelectronic die stack. In one embodiment, the microelectronic die stack may have a plurality of stacked microelectronic dice, wherein one microelectronic die of the plurality of microelectronic dice has a footprint greater than the other microelectronic die of the plurality of microelectronic dice, and wherein the at least one microelectronic device is attached to the one microelectronic die of the plurality of microelectronic dice having the greater footprint.

Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.

Abstract: A high density die package configuration is shown for use on system boards. In one example, an apparatus includes a system board, a first package mounted to the system board, a second package mounted to the system board, and an interface package mounted between the first and the second package and coupled directly to the first package and to the second package through the respective first and second packages.

Abstract: Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.

Abstract: Embodiments are generally directed to a buried electrical debug access port. An embodiment of an apparatus includes a substrate or printed circuit board; one or more electronic components coupled with the substrate or printed circuit board; one or more electrical access ports coupled with the substrate or printed circuit board, each electrical access port including electrically conductive material; and an encapsulant material, the encapsulant material encapsulating the one or more access ports, wherein the one or more access ports are electrically connected to one or more circuits of the apparatus to provide debugging access to the apparatus.

Abstract: A microelectronic package may be fabricated having a microelectronic die stack attached to a microelectronic substrate and at least one microelectronic device, which is separate from the microelectronic die stack, attached to the microelectronic substrate within the footprint of one of the microelectronic dice within the microelectronic die stack. In one embodiment, the microelectronic die stack may have a plurality of stacked microelectronic dice, wherein one microelectronic die of the plurality of microelectronic dice has a footprint greater than the other microelectronic die of the plurality of microelectronic dice, and wherein the at least one microelectronic device is attached to the one microelectronic die of the plurality of microelectronic dice having the greater footprint.

Abstract: Electronic device package technology is disclosed. In one example, an electronic device includes a substrate having a bond finger, a die coupled to the substrate and having a bond pad, a first bond wire coupled between the bond pad and the bond finger, and a second bond wire coupled between the bond pad and the bond finger. The first bond wire is reverse bonded between a pad solder ball on the bond pad and a finger solder ball on the bond finger. The second bond wire is forward bonded between a supplemental pad solder ball on the pad solder and the bond finger adjacent the finger solder ball. Associated systems and methods are also disclosed.