Patents by Inventor Bill Skelton

Bill Skelton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Cache memory expansion and transparent interconnection
    Patent number: 5253358
    Abstract: A 64 bit wide memory is multiplexed over a 32 bit data bus to provide data to a 64 bit line size cache memory controlled by an 82385 cache controller. The memory addresses to all 64 bits of memory are held during the entire transfer so that a zero wait state second 32 bit transfer occurs. Logic develops the necessary next address and ready pulses and blocks these signals from the cache controller. Logic also handles the bit 2 address for the main and cache memories. The main memory is operated in paged mode to further increase system performance.
    Type: Grant
    Filed: May 7, 1992
    Date of Patent: October 12, 1993
    Assignee: Compaq Computer Corporation
    Inventors: Roy E. Thoma, III, Joseph P. Miller, Bill Skelton, Mark Taylor, Randy M. Bonella