Abstract: Disclosed herein is a method of printing a document image with a host computer and an associated printer, where the printer has a printhead with a plurality of laterally-spaced dot columns. The method includes rasterizing the document image in the host computer to produce raster-formatted data representing the document image. This data is then segregated into data swaths corresponding to swaths of the printhead, and further segregating into dot-column data blocks corresponding to printhead dot columns. The dot-column data blocks are then sent to the printer in the order in which they will be processed by printhead electronics within the printer. The printer passes the dot-column data blocks to the printhead to control firing of printhead's nozzles.

Abstract: A microcomputer is disclosed which has an architecture designed for the efficient performance of digital signal processing applications. The microcomputer contains a primary arithmetic logic unit for performing data operations, and a pair of auxiliary arithmetic logic units for calculating indirect memory address values. A memory bus within the microcomputer has data lines therein, and two sets of address lines; each of the auxiliary arithmetic logic units is connected to one of the sets of address lines. The auxiliary arithmetic logic units are capable of performing circular addressing calculations, by calculating the next memory address from the prior memory address and an index value, and by comparing the next memory address to the limits of the memory block within the circular addressing scheme.

Abstract: A microcomputer is disclosed which has an architecture designed for the efficient performance of digital signal processing applications. The microcomputer contains a primary arithmetic logic unit for performing data operations, and a pair of auxiliary arithmetic logic units for calculating indirect memory address values. A memory bus within the microcomputer has data lines therein, and two sets of address lines; each of the auxiliary arithmetic logic units is connected to one of the sets of address lines. The auxiliary arithmetic logic units are capable of performing circular addressing calculations, by calculating the next memory address from the prior memory address and an index value, and by comparing the next memory address to the limits of the memory block within the circular addressing scheme.