Patents by Inventor Bin Lian

Bin Lian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942362
    Abstract: Embodiments described herein relate generally to methods for forming a conductive feature in a dielectric layer in semiconductor processing and structures formed thereby. In some embodiments, a structure includes a dielectric layer over a substrate, a surface modification layer, and a conductive feature. The dielectric layer has a sidewall. The surface modification layer is along the sidewall, and the surface modification layer includes phosphorous and carbon. The conductive feature is along the surface modification layer.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Jou Lian, Kuo-Bin Huang, Neng-Jye Yang, Li-Min Chen
  • Publication number: 20180220103
    Abstract: The present application discloses a camera for video monitoring and a monitoring system. The camera comprises: a sensor device, configured to acquire monitoring direction information of the camera; a positioning device, configured to position a geographical location of the camera; a processor, configured to obtain a monitoring azimuth of the camera based on the monitoring direction information and determine a monitoring area of the camera based on the monitoring azimuth and the geographical location. The present application solves the technical problem of being unable to determine the monitoring area of a camera accurately, and achieves the effect that the camera can determine the monitoring area accurately.
    Type: Application
    Filed: May 24, 2016
    Publication date: August 2, 2018
    Inventors: Yanxia WANG, Bin LIAN, Shuyi CHEN
  • Patent number: 8968684
    Abstract: Microplates, reaction modules and optical detection systems for chemical and/or bio-chemical reactions including polymerase chain reactions.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: March 3, 2015
    Inventor: Bin Lian
  • Publication number: 20120276541
    Abstract: Microplates, reaction modules and optical detection systems for chemical and/or bio-chemical reactions including polymerase chain reactions.
    Type: Application
    Filed: April 28, 2011
    Publication date: November 1, 2012
    Inventor: Bin Lian
  • Patent number: 7057114
    Abstract: A circuit board includes two planes. A via spans the planes, and an impedance component is placed in the via. The impedance component is coupled to both of the planes. The impedance component provides an impedance between the planes without the use of traces or hand soldering of components.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: June 6, 2006
    Assignee: Intel Corporation
    Inventors: Terry Dishongh, Prateek Dujari, Bin Lian, Damion Searls
  • Patent number: 6913999
    Abstract: A semiconductor substrate with integrated circuit devices on its front side and a high thermal conductivity layer such as diamond on its back side, with components such as capacitors embedded in the high thermal conductivity layer and coupled to the front side integrated circuits with vias through the substrate.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: July 5, 2005
    Assignee: Intel Corporation
    Inventors: Damion T. Searls, Prateek J. Dujari, Bin Lian
  • Patent number: 6797085
    Abstract: A metallurgical process expands the grain structure in a heat sink from a fine grain to a coarse grain to improve the thermal conductivity of the heat sink. The temperature of the heat sink is raised to a level high enough to lead to a secondary re-crystallization grain growth in the metal alloy. The temperature of the heat sink is then gradually lowered to a cryogenic temperature and then immediately brought back up to ambient temperature to strengthen the material.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: September 28, 2004
    Assignee: Intel Corporation
    Inventors: Terrance Dishongh, Prateek Dujari, Bin Lian, Damion Searls
  • Patent number: 6774310
    Abstract: An enhanced joint thickness lead used for surface mounting electronic devices to a substrate, wherein a portion of the enhanced joint thickness lead that is substantially parallel to the substance. The enhanced joint thickness lead includes an arcuate structure, which provides an enhanced joint thickness for the solder used to connect the lead to the substrate. The enhanced joint thickness of the solder results in a more robust attachment of the electronic device.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: August 10, 2004
    Assignee: Intel Corporation
    Inventors: Terrance J. Dishongh, Prateek J. Dujari, Bin Lian, Damion T. Searls
  • Patent number: 6775122
    Abstract: A circuit board includes two planes. A via spans the planes, and an impedance component is placed in the via. The impedance component is coupled to both of the planes. The impedance component provides an impedance between the planes without the use of traces or hand soldering of components.
    Type: Grant
    Filed: December 28, 1999
    Date of Patent: August 10, 2004
    Assignee: Intel Corporation
    Inventors: Terry Dishongh, Prateek Dujari, Bin Lian, Damion Searls
  • Patent number: 6752204
    Abstract: An iodine-containing thermal interface material disposed between a heat source and a heat dissipation device.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: June 22, 2004
    Assignee: Intel Corporation
    Inventors: Terrance J. Dishongh, Prateek J. Dujari, Bin Lian, Damion Searls
  • Patent number: 6731221
    Abstract: An electrically modifiable label. In some embodiments, an electrically modifiable label may be applied to or form a part of products that have configurable or otherwise dynamic characteristics. That is, characteristics or desirability that vary over time or characteristics that may be selected or determined at or after advanced stages of manufacturing processes.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: May 4, 2004
    Assignee: Intel Corporation
    Inventors: Terrance J. Dioshongh, Damion T. Searls, Bin Lian
  • Publication number: 20040057184
    Abstract: A circuit board includes two planes. A via spans the planes, and an impedance component is placed in the via. The impedance component is coupled to both of the planes. The impedance component provides an impedance between the planes without the use of traces or hand soldering of components.
    Type: Application
    Filed: July 7, 2003
    Publication date: March 25, 2004
    Inventors: Terry Dishongh, Prateek Dujari, Bin Lian, Damion Searls
  • Publication number: 20040056272
    Abstract: A semiconductor substrate with integrated circuit devices on its front side and a high thermal conductivity layer such as diamond on its back side, with components such as capacitors embedded in the high thermal conductivity layer and coupled to the front side integrated circuits with vias through the substrate.
    Type: Application
    Filed: September 24, 2003
    Publication date: March 25, 2004
    Inventors: Damion T. Searls, Prateek J. Dujari, Bin Lian
  • Publication number: 20040017295
    Abstract: An electrically modifiable label. In some embodiments, an electrically modifiable label may be applied to or form a part of products that have configurable or otherwise dynamic characteristics. That is, characteristics or desirability that vary over time or characteristics that may be selected or determined at or after advanced stages of manufacturing processes.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 29, 2004
    Inventors: Terrance J. Dishongh, Damion T. Searls, Bin Lian
  • Patent number: 6649937
    Abstract: A semiconductor substrate with integrated circuit devices on its front side and a high thermal conductivity layer such as diamond on its back side, with components such as capacitors embedded in the high thermal conductivity layer and coupled to the front side integrated circuits with vias through the substrate.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 18, 2003
    Assignee: Intel Corporation
    Inventors: Damion T. Searls, Prateek J. Dujari, Bin Lian
  • Patent number: 6648506
    Abstract: The present invention provides a fluorescent imaging thermographic method and system for use particularly in surface temperature measurements, which are reproducible over time. The invention provides a temperature-sensitive fluorescent probe comprising a rare earth compound in an ultraviolet and fluorescence transparent medium wherein the intensity of fluorescence varies as the temperature varies, in particular, provided are probes comprising Europium(1,1,1,5,5,5-hexafluoroacetylacetone)3 for measuring temperatures greater than 24° C., and Terbium(1,1,1,5,5,5-hexafluoroacetylacetone)3 for measuring temperatures less than 24° C. The probe is applied as a layer to a surface, exposed to fluorescence-inducing energy, and emitted fluorescence measured. A ratio imaging algorithm enables the temperature at each location on the surface to be determined.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: November 18, 2003
    Assignee: Board of Trustees of Michigan State University
    Inventors: John J. McGrath, Bin Lian
  • Publication number: 20030183823
    Abstract: A semiconductor substrate with integrated circuit devices on its front side and a high thermal conductivity layer such as diamond on its back side, with components such as capacitors embedded in the high thermal conductivity layer and coupled to the front side integrated circuits with vias through the substrate.
    Type: Application
    Filed: March 26, 2002
    Publication date: October 2, 2003
    Inventors: Damion T. Searls, Prateek J. Dujari, Bin Lian
  • Publication number: 20030128737
    Abstract: The present invention provides a fluorescent imaging thermographic method and system for use particularly in surface temperature measurements, which are reproducible over time. The invention provides a temperature-sensitive fluorescent probe comprising a rare earth compound in an ultraviolet and fluorescence transparent medium wherein the intensity of fluorescence varies as the temperature varies, in particular, provided are probes comprising Europium (1,1,1,5,5,5-hexafluoroacetylacetone)3 for measuring temperatures greater than 24° C., and Terbium(1,1,1,5,5,5-hexafluoroacetylacetone)3 for measuring temperatures less than 24° C. The probe is applied as a layer to a surface, exposed to fluorescence-inducing energy, and emitted fluorescence measured. A ratio imaging algorithm enables the temperature at each location on the surface to be determined.
    Type: Application
    Filed: September 7, 2001
    Publication date: July 10, 2003
    Applicant: Board of Trustees operating Michigan State University
    Inventors: John J. McGrath, Bin Lian
  • Publication number: 20030080938
    Abstract: A wireless peripheral for a processor-based device may include a plurality of operators or control buttons that are operated to indicate commands. Those commands may be forwarded over a wireless link in the form of electrical signals to the processor-based device. Operation of the controls or operators may be converted into electrical energy which may be utilized to power the wireless peripheral.
    Type: Application
    Filed: October 25, 2001
    Publication date: May 1, 2003
    Inventors: Bin Lian, Franklin G. Monzon, Prateek Dujari
  • Patent number: 6550531
    Abstract: A heat dissipation device including a base portion having a plurality of projections extending therefrom. The base portion may have a vapor chamber defined therein and may have first surface sloped from a central apex portion to edges of the base portion. The vapor chamber includes at least one extension on a vapor chamber upper surface which is adapted to direct a condensed working fluid toward a desired location on a vapor chamber lower surface. The vapor chamber lower surface may have at least one depression to collect a greater portion of the working fluid in a desired location(s).
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: April 22, 2003
    Assignee: Intel Corporation
    Inventors: Damion T. Searls, Terrance J. Dishongh, Prateek J. Dujari, Bin Lian