Patents by Inventor Bin Lu

Bin Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260139232
    Abstract: Provided herein are methods for purifying recombinant adeno-associated virus (rAAV) particles using chromatography in a large scale. Further provided include the rAAV particles and the pharmaceutical composition prepared by the method.
    Type: Application
    Filed: October 6, 2023
    Publication date: May 21, 2026
    Inventors: Ronald JENKINS, Nripen SINGH, Aaron COLLIER, Supriya KUMAR, Bin LU
  • Patent number: 12632374
    Abstract: The present disclosure discloses memory controllers, operation methods thereof, and memory systems. The memory controller comprises: a first buffer configured to buffer a valid data table and mapping information to be updated, wherein the valid data table is to record a plurality of valid transmission unit counts, the valid transmission unit count indicates the number of transmission units that store valid data in a corresponding block, the mapping information to be updated comprises at least one piece of mapping information from a logical address to a physical address, and each transmission unit corresponds to one physical address; a second buffer configured to buffer a mapping table, wherein the mapping table is to record a plurality of pieces of mapping information; and an acceleration processing circuit configured to: update the mapping table based on the mapping information; and update the valid data table based on the mapping information to be updated.
    Type: Grant
    Filed: January 25, 2024
    Date of Patent: May 19, 2026
    Assignee: Yangtze memory Technologies Co., Ltd.
    Inventor: Bin Lu
  • Patent number: 12608916
    Abstract: Implementations of the present disclosure relate to methods, devices, and computer program products for data augmentation. In the method, mixed data is generated from first data and second data, and the mixed data comprises a first portion from the first data and a second portion from the second data. An attention map is obtained for the mixed data based on distributions of the first and second portions in the mixed data, here the attention map describes contributions of the first and second data to the mixed data. A label is determined for the mixed data based on the attention map and a first label for the first data and a second label for the second data. With these implementations, the label is determined based on the contributions of the first and second images in an accurate and effective way, and thus has a value that is much closer to the ground true.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 21, 2026
    Assignee: LEMON INC.
    Inventors: Song Bai, Jieneng Chen, Shuyang Sun, Ju He, Bin Lu
  • Publication number: 20260107048
    Abstract: A photosensitive assembly for camera module includes a support substrate, a photosensitive chip electrically connected to the support substrate, and a molded part injection-molded on the support substrate, wherein the molded part includes a molded base and a first protrusion, a peripheral side of the molded base has a spacing distance from an edge of the support substrate, the first protrusion is extended outward from the peripheral side of the molded base to the edge of the support substrate, and a volume proportion of silicon powder in the molded part is 75%˜85%. By optimizing the composition of the molding liquid of the molded part, the occurrence of mold sticking is reduced.
    Type: Application
    Filed: September 11, 2025
    Publication date: April 16, 2026
    Inventors: Shi Xiong, Qingjie Wang, Peng Lu, Dingjie Ruan, Kai Chen, Jie Yu, Qianjin Cao, Yuxiang Wang, Cong Chen, Hanghang Shen, Mingxuan Wang, Bin Lu, Jiacheng Song
  • Publication number: 20260099726
    Abstract: The embodiment of the disclosure provides an information classification method, apparatus, device and medium. The method includes: training a local classification model at least according to a first training objective, to reduce an association between a plurality of feature representations of information samples generated by the local classification model; and sending a model parameter of the trained local classification model to a remote device, to construct a global classification model for implementing the information classification. By applying decorrelation on the feature representation generated by the model, the problem of dimensional collapse of feature representation is effectively and efficiently solved.
    Type: Application
    Filed: July 7, 2023
    Publication date: April 9, 2026
    Inventors: Song BAI, Yujun SHI, Wenqing ZHANG, Bin LU
  • Publication number: 20260072201
    Abstract: Embodiments of this application provide an optical assembly and an electronic device. The optical assembly includes an optical component and an optical cover plate. The optical cover plate includes an optical body layer. The optical body layer covers a light-incident surface of the optical component and has a light-transmissive area arranged opposite to the optical component. The optical cover plate further includes a hydrophobic film layer. The hydrophobic film layer is light-transmissive, is located on a side of the optical body layer facing the optical component, and covers the light-transmissive area. A surface of the hydrophobic film layer facing the optical component is a hydrophobic rough surface with a first micro-nano structure. The optical assembly in this application can effectively reduce a proportion of mist-like dirt occurring on the optical cover plate.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 12, 2026
    Inventors: Dengkui MIAO, Chengjie GAO, Wenbin XU, Bin LU
  • Publication number: 20260038927
    Abstract: An energy storage box and an energy storage apparatus. The energy storage box comprises a box body, wherein the box body defines a mounting space, mounting beams are provided in the mounting space and located at the top of the mounting space, the mounting beams are fixed to the box body, and a bottom wall of the mounting space and the mounting beams are opposite each other and spaced apart in the direction of height of the energy storage box, the bottom wall of the mounting space being of a plate-shaped structure; and mounting columns, wherein the mounting columns are arranged in the mounting space, two ends of each mounting column respectively being fixedly connected to one mounting beam and the bottom wall of the mounting space.
    Type: Application
    Filed: October 14, 2025
    Publication date: February 5, 2026
    Inventors: Hailong LUO, Bin LU, Qianyi GAN, Yingxue LIU
  • Patent number: 12533044
    Abstract: A magnetic resonance (MR) apparatus is provided. The MR apparatus may include at least one processor. The at least one processor may be configured to obtain an operating state of the MR apparatus; and select, from two or more power supply devices, a power supply device for supplying power for at least one coil of the MR apparatus according to the operating state of the MR apparatus. The at least one processor may be configured to obtain, through a relay component connected to a coil section, motion information of at least one component of the coil section; and generate, based on the motion information, control instructions for adjusting communication parameters of a first directional communication module of the coil section and a second directional communication module of the relay component.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: January 27, 2026
    Assignee: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Xiaolei Guan, Zimeng Liu, Fangyan Hou, Wei Shi, Zhen Yang, Qingchang Chen, Chunyan Zhang, Bin Lu
  • Patent number: 12527714
    Abstract: A sexual stimulation device includes a housing and a flexible massage body. The housing includes first and second housing portions and an expandable and contractible connector that connects the two housing portions. The flexible massage body is disposed within the housing, having a massage cavity for receiving a penis. The housing has first and second end portions opposite to each other and a middle portion therebetween. The connector includes a deformation portion that undergoes deformation when the first or the second housing portions are subjected to pressure. Also, a first projected length of the first housing portion or the second housing portion onto a plane perpendicular to the length direction and a second projected length of the flexible massage body in the same direction of the plane are substantially the same.
    Type: Grant
    Filed: June 20, 2025
    Date of Patent: January 20, 2026
    Assignee: HYTTO PTE. LTD.
    Inventors: Zhiwen Wu, Kaixiang Fang, Bin Lu
  • Publication number: 20250367465
    Abstract: The invention disclosed herein presents a method and system for individualized target localization for transcranial magnetic stimulation (TMS) in treating depression based on group-level differential statistical maps. The system acquires resting-state functional MRI (R-fMRI) brain imaging data from subjects in both a major depressive disorder (MDD) group and a matching normal control group, followed by data preprocessing. Taking the spherical subgenual anterior cingulate cortex (sgACC) as the seed point, functional connectivity calculations are performed for each subject, and sgACC functional connectivity maps within the mask of the dorsolateral prefrontal cortex (DLPFC) region are extracted. A two-sample t-test is conducted on the sgACC functional connectivity maps of the MDD and normal control groups to identify clusters within the DLPFC mask that show significant differences between the two groups, which are used as group-level localization targets.
    Type: Application
    Filed: August 13, 2025
    Publication date: December 4, 2025
    Applicant: BEIJING DEEPBRAIN TECHNOLOGY CO., LTD.
    Inventors: Chao-gan YAN, Bin LU
  • Publication number: 20250309896
    Abstract: A new inverting logic gate or a FET gate driver is disclosed. The logic gate mitigates the trade-off between power dissipation (or quiescent power) and slew rate of the typical RTL and DLL buffers by using an innovative circuit topology involving a pull-up bootstrapping transistor. The bootstrapping transistor may be an enhancement mode GaN field effect transistor (FET). This bootstrapping transistor may be driven by the complement of the input signal. Alternatively, the bootstrapping transistor may monitor the drain terminal of the pull-down transistor and conduct current accordingly. Other Boolean functions may also be achieved using this approach.
    Type: Application
    Filed: March 14, 2025
    Publication date: October 2, 2025
    Inventors: Shylesh Srinivasan, Dongfei Pei, Bin Lu
  • Publication number: 20250301687
    Abstract: A new semiconductor structure is disclosed. The semiconductor structure includes an active region that is made narrower through the application of a p-type cap layer disposed thereupon. The p-type cap layer may be disposed on one side of the active region, or on both sides of the active region. This p-type cap layer may be applied to various semiconductor structures, including transistors, diodes and semiconductor resistors.
    Type: Application
    Filed: February 24, 2025
    Publication date: September 25, 2025
    Inventors: Hal Emmer, Bin Lu
  • Publication number: 20250267901
    Abstract: A new semiconductor structure is disclosed. The semiconductor structure includes patterned dielectric layers disposed between the field plates and the channel layer. These patterned dielectric layers serve to further shape the electric field in the channel layer. This structure is not only applicable to III-nitride semiconductor devices, such as transistors, diodes or any other devices, but also is applicable to other semiconductor devices, such as Si LDMOS, SiC transistors, GaAs transistors.
    Type: Application
    Filed: January 29, 2025
    Publication date: August 21, 2025
    Inventors: Bin Lu, Dongfei Pei, Mark Dipsey
  • Patent number: 12389524
    Abstract: Disclosed are a molded circuit board and a camera module, and a manufacturing method thereof and an electronic device comprising the same. The molded circuit board includes a circuit board main body and a molded structure. The circuit board main body includes at least one circuit layer and at least one substrate layer, wherein the circuit layer and the substrate layer are stacked in a manner of being spaced apart. The molded structure includes a molded layer, wherein the molded layer is stacked on at least one surface of the circuit board main body to cover at least part of the substrate.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: August 12, 2025
    Assignee: NINGBO SUNNY OPOTECH CO., LTD.
    Inventors: Zhongyu Luan, Zhen Huang, Bin Lu, Li Liu, Chengchang Zheng, Tinghua Li
  • Patent number: 12364039
    Abstract: The present application relates to a photosensitive assembly, a camera module and manufacturing methods therefor. The photosensitive assembly comprises a circuit board, a photosensitive chip electrically connected to the circuit board, at least one electronic component disposed on the circuit board, and a molded body integrally formed on the circuit board. The molded body has at least one slot formed therein in a recessed manner, and the slot is located outside the photosensitive chip. In this way, the magnitude of stress that the molded body acts on the photosensitive chip is reduced by means of the slot being disposed in the molded body, so as to effectively reduce the amount of deformation of the photosensitive chip due to the stress.
    Type: Grant
    Filed: July 2, 2020
    Date of Patent: July 15, 2025
    Assignee: NINGBO SUNNY OPOTECH CO., LTD.
    Inventors: Zhongyu Luan, Zhen Huang, Li Liu, Xinxiang Sun, Bin Lu
  • Patent number: 12347198
    Abstract: According to embodiments of the disclosure, a method, system, device, medium and product for video processing are provided. The method includes extracting a plurality of feature maps from a plurality of frames of a video respectively; determining a plurality of frame-level features of a video instance in the plurality of frames based on the plurality of feature maps respectively, a frame-level feature in each of the frames representing feature information of the video instance in the frame; determining a video-level feature of the video instance by aggregating the plurality of frame-level features, the video-level feature representing feature information of the video instance across the plurality of frames; and determining an analysis result for the video instance in the plurality of frames based at least on the video-level feature.
    Type: Grant
    Filed: June 3, 2024
    Date of Patent: July 1, 2025
    Assignee: Beijing Youzhuju Network Technology Co., Ltd.
    Inventors: Junfeng Wu, Song Bai, Yi Jiang, Wenqing Zhang, Bin Lu
  • Patent number: 12335629
    Abstract: An imaging exposure control method and apparatus, a device and a storage medium, which relate to the field of artificial intelligence technologies, such as machine learning technologies and intelligent imaging technologies, are disclosed. An implementation includes performing semantic segmentation on a preformed image to obtain semantic segmentation images of at least two semantic regions; estimating an exposure duration of each semantic region based on the semantic segmentation image and the preformed image; and controlling exposure of each semantic region during imaging based on the exposure duration of each semantic region.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: June 17, 2025
    Assignee: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Shengyu Wei, Yuning Du, Cheng Cui, Ruoyu Guo, Shuilong Dong, Bin Lu, Tingquan Gao, Qiwen Liu, Xiaoguang Hu, Dianhai Yu, Yanjun Ma
  • Publication number: 20250159960
    Abstract: A new transistor structure for use with III-Nitride semiconductor structures is disclosed. The transistor includes heavily doped n++ layers located in the source region and the drain region. The source and drain electrodes are disposed on their respective heavily doped n++ layer. Further, in some embodiments, a portion of the gate electrode may be disposed on one or both of the heavily doped n++ regions. These regions improve the on-resistance of the transistor, especially for low voltage applications.
    Type: Application
    Filed: November 5, 2024
    Publication date: May 15, 2025
    Inventors: Dongfei Pei, Bin Lu, Hal Emmer, Mark Dipsey
  • Patent number: D1091656
    Type: Grant
    Filed: January 24, 2024
    Date of Patent: September 2, 2025
    Assignee: MAKEBLOCK CO., LTD.
    Inventor: Bin Lu
  • Patent number: D1092769
    Type: Grant
    Filed: March 12, 2025
    Date of Patent: September 9, 2025
    Assignee: HYTTO PTE. LTD.
    Inventors: Zhiwen Wu, Bin Lu, Xun Chen