Abstract: Disclosed are a display panel and a display apparatus, including: a first base substrate, a second base substrate, a plurality of spacers. The first base substrate is provided with a plurality of pixel units, each of the plurality of pixel units includes a plurality of sub-pixels, and each of the plurality of sub-pixels is correspondingly provided with the common electrode via hole and the pixel via hole; the plurality of sub-pixels include a first sub-pixel and a second sub-pixel adjacent to each other along a first direction; where, in the first direction, an orthographic projection of at least one of the plurality of spacers on the first base substrate is between an orthographic projection of the common electrode via hole corresponding to the first sub-pixel on the first base substrate and an orthographic projection of the pixel via hole corresponding to the second sub-pixel on the first base substrate.

Abstract: A display substrate is provided to include: a first base substrate including a sealing region and a display port region, wherein at least one first connection region and at least one second connection region are in the display port region, a first overlapping region is formed between the second and first connection regions; first and second connection terminals in the first and second connection regions, respectively; and a planarization layer including at least one first trench and at least one second trench corresponding to the first and second connection regions therein, respectively; orthographic projections of bottoms of first and second trenches on the first base substrate cover corresponding first and second connection regions, respectively; the planarization layer includes: a first pattern corresponding to the first overlapping region; orthographic projections of the first pattern and its corresponding first overlapping region on the first base substrate overlap with each other.

Abstract: The disclosure provides a display panel and a display device, and belongs to the technical field of display. The disclosure provides a display panel including a central display region and a bent display region at an edge of the central display region. The central display region is provided with a plurality of first pixels, and the bent display region is provided with a plurality of second pixels. A number of second pixels in a unit area is greater than a number of first pixels in the unit area. In the display panel, the PPI of the bent display region is higher than that of the central display region, so the number of the second pixels for gray-scale transition in the bent display region is increased, the gray-scale transition in the bent display region is uniform, and the aliasing phenomenon at the edge of the bent display region is improved.

Abstract: The disclosure provides a display panel and a display device, and belongs to the technical field of display. The disclosure provides a display panel including a central display region and a bent display region at an edge of the central display region. The central display region is provided with a plurality of first pixels, and the bent display region is provided with a plurality of second pixels. A number of second pixels in a unit area is greater than a number of first pixels in the unit area. In the display panel, the PPI of the bent display region is higher than that of the central display region, so the number of the second pixels for gray-scale transition in the bent display region is increased, the gray-scale transition in the bent display region is uniform, and the aliasing phenomenon at the edge of the bent display region is improved.

Abstract: A display substrate, including a plurality of gate lines and a plurality of data lines defining a plurality of pixel regions, where the plurality of pixel regions include a plurality of normal pixel regions and a plurality of redundant pixel regions at a periphery of the normal pixel regions; where each normal pixel region is provided with a first pixel electrode and a first transistor, each redundant pixel region is provided with a second pixel electrode and a second transistor, a gate of the first transistor is connected to a corresponding gate line, a source of the first transistor is connected to a corresponding data line, and a drain of the first transistor is connected to the first pixel electrode; and the second pixel electrode and the second transistor are insulated and spaced apart from each other.

Abstract: Provided is an array substrate having sub-pixel regions. The array substrate includes: a substrate; a pixel electrode layer and a common electrode layer that are disposed on the substrate, wherein the pixel electrode layer comprises pixel electrodes disposed in the sub-pixel regions in a one-to-one correspondence manner; and common signal lines disposed on the substrate. The array substrate further includes data lines, gate lines, and transistors; wherein each data line among the data lines is electrically connected to first electrodes of the transistors in a same column of the transistors, an orthographic projection of the data line on the substrate passing through orthographic projections of gate electrodes of the transistors in the same column of the transistors on the substrate, and second electrodes of the transistors are connected to the pixel electrodes correspondingly.

Abstract: Disclosed are a display panel and a display apparatus, including: a first base substrate, a second base substrate, a plurality of spacers. The first base substrate is provided with a plurality of pixel units, each of the plurality of pixel units includes a plurality of sub-pixels, and each of the plurality of sub-pixels is correspondingly provided with the common electrode via hole and the pixel via hole; the plurality of sub-pixels include a first sub-pixel and a second sub-pixel adjacent to each other along a first direction; where, in the first direction, an orthographic projection of at least one of the plurality of spacers on the first base substrate is between an orthographic projection of the common electrode via hole corresponding to the first sub-pixel on the first base substrate and an orthographic projection of the pixel via hole corresponding to the second sub-pixel on the first base substrate.

Abstract: Provided is an array substrate, having a plurality of sub-pixel regions. The array substrate includes: a substrate; a pixel electrode layer and a common electrode layer that are disposed on the substrate; and a plurality of common signal lines disposed on the substrate. The plurality of common signal lines are insulated from the pixel electrode layer and electrically connected to the common electrode layer. An overlapped region is present between an orthographic projection of the common signal lines on the substrate and an orthographic projection of the pixel electrode layer on the substrate. The common signal lines have a plurality of electrode structures, wherein different electrode structures of the plurality of electrodes structures are disposed in different sub-pixel regions, and the plurality of electrode structures include a lap electrode lapped to the common electrode layer and an auxiliary electrode not lapped to the common electrode layer.

Abstract: A display substrate includes a base substrate, pixel units, and data lines. At least one sub-pixel includes a common electrode, which includes a dark region electrode portion and a light transmitting region electrode portion. The common electrode is provided with slits, an end portion of at least one slit has first to third portions, and the second portion is between the first portion and the third portion. In the first direction, the first portion is arranged side by side with an adjacent dark region electrode portion in the first direction, the second portion is arranged side by side with a part of an adjacent light transmitting region electrode portion, and the third portion is arranged side by side with another part of the adjacent light transmitting region electrode portion in the first direction. An inclination of the second portion is greater than that of the third portion and less than that of the first portion.

Abstract: A display substrate, including: a first base substrate, including a display region and a peripheral region surrounding the display region; at least one common voltage line in the display region, each being configured with at least one conductive connection region; a first passivation layer on a side of the common voltage line away from the first base substrate; a common electrode on a side of the first passivation layer away from the first base substrate; a second passivation layer on a side of the common electrode away from the first base substrate; a pixel electrode on a side of the second passivation layer away from the first base substrate; and a first conductive connection electrode in the corresponding conductive connection region and in the same layer as the pixel electrode, where the common electrode is electrically connected to the common voltage line through the first conductive connection electrode.

Abstract: Provided is an array substrate. The array substrate includes a substrate, comprising a display region and a peripheral region surrounding the display region, the peripheral region at least including a gate-driver-on-array (GOA) region extending in a first direction; a plurality of thin film transistors, the plurality of thin film transistors being disposed at least in the GOA region; and a plurality of first patterns, wherein the plurality of first patterns are disposed at least on one side of the GOA region, the plurality of first patterns are spaced apart from the GOA region in the first direction, and a plurality of first patterns disposed on a same side of the GOA region are arranged in an array.

Abstract: A display substrate is provided to include: a first base substrate including a sealing region and a display port region, wherein at least one first connection region and at least one second connection region are in the display port region, a first overlapping region is formed between the second and first connection regions; first and second connection terminals in the first and second connection regions, respectively; and a planarization layer including at least one first trench and at least one second trench corresponding to the first and second connection regions therein, respectively; orthographic projections of bottoms of first and second trenches on the first base substrate cover corresponding first and second connection regions, respectively; the planarization layer includes: a first pattern corresponding to the first overlapping region; orthographic projections of the first pattern and its corresponding first overlapping region on the first base substrate overlap with each other.

Abstract: A display substrate, including a plurality of gate lines and a plurality of data lines defining a plurality of pixel regions, where the plurality of pixel regions include a plurality of normal pixel regions and a plurality of redundant pixel regions at a periphery of the normal pixel regions; where each normal pixel region is provided with a first pixel electrode and a first transistor, each redundant pixel region is provided with a second pixel electrode and a second transistor, a gate of the first transistor is connected to a corresponding gate line, a source of the first transistor is connected to a corresponding data line, and a drain of the first transistor is connected to the first pixel electrode; and the second pixel electrode and the second transistor are insulated and spaced apart from each other.

Abstract: A display panel, a circuit board and a display device are provided. The display panel includes a first pad region including a first pad connected to a first integrated circuit, a second pad region including a second pad electrically connected to a second integrated circuit, a third pad region including third pads electrically connected to a circuit board and a common signal line electrically connected to the common electrode of the sub-pixel. The display panel further includes a first signal line and a second signal line, the first pad is electrically connected to the third pad through the first signal line, the second pad is electrically connected to the third pad through the second signal line; the first signal line and the second signal line are electrically connected to each other through the third pads and the circuit board.

Abstract: An array substrate (000) and a display apparatus, relating to the technical field of display. The array substrate (000) comprises: a substrate (100); a pixel electrode layer (200) and a common electrode layer (300) located on the substrate (100); and a plurality of common signal lines (400) located on the substrate (100), wherein the common signal lines (400) are insulated from the pixel electrode layer (200) and electrically connected to the common electrode layer (300), and an orthographic projection of the common signal lines (400) on the substrate (100) and an orthographic projection of the pixel electrode layer (200) on the substrate (100) have an overlapping area.

Abstract: Provided are a display substrate, display panel and display device. The display substrate comprises: a base substrate, comprising a display area and a surrounding area comprising a gluing area; multiple signal lines; multiple fanout lines, connected to multiple signal lines in a one-to-one correspondence manner. The fanout lines comprise: a first fanout line, and a second fanout line located at the side of first fanout line away from the base substrate; at least in the gluing area, the orthographic projection of the second fanout line on the base substrate substantially overlaps that of the first fanout line on the base substrate; in part of the area outside the gluing area, the size of an overlapping area between orthographic projections of the second fanout line and first fanout line on the base substrate in the direction perpendicular to the extension direction of the fanout lines is smaller than a first preset threshold.

Abstract: Provided is a thin film transistor unit. The thin film transistor unit includes a first gate, a first gate insulating layer, a first semiconductor layer and a first source/drain electrode layer that are sequentially arranged on a substrate, wherein the first source/drain electrode layer includes a first source and a first drain that are spaced apart from each other along a first direction; and a floating electrode disposed on a side of the first semiconductor layer away from the first gate insulating layer, wherein in the first direction, an orthographic projection of the floating electrode on the substrate falls between an orthographic projection of the first source on the substrate and an orthographic projection of the first drain on the substrate.

Abstract: A display panel, a circuit board and a display device are provided. The display panel includes a first pad region including a first pad connected to a first integrated circuit, a second pad region including a second pad electrically connected to a second integrated circuit, a third pad region including third pads electrically connected to a circuit board and a common signal line electrically connected to the common electrode of the sub-pixel. The display panel further includes a first signal line and a second signal line, the first pad is electrically connected to the third pad through the first signal line, the second pad is electrically connected to the third pad through the second signal line; the first signal line and the second signal line are electrically connected to each other through the third pads and the circuit board.

Abstract: The disclosure provides a display panel and a display device, and belongs to the technical field of display. The disclosure provides a display panel including a central display region and a bent display region at an edge of the central display region. The central display region is provided with a plurality of first pixels, and the bent display region is provided with a plurality of second pixels. A number of second pixels in a unit area is greater than a number of first pixels in the unit area. In the display panel, the PPI of the bent display region is higher than that of the central display region, so the number of the second pixels for gray-scale transition in the bent display region is increased, the gray-scale transition in the bent display region is uniform, and the aliasing phenomenon at the edge of the bent display region is improved.

Abstract: Provided are a display substrate, display panel and display device. The display substrate comprises: a base substrate, comprising a display area and a surrounding area comprising a gluing area; multiple signal lines; multiple fanout lines, connected to multiple signal lines in a one-to-one correspondence manner. The fanout lines comprise: a first fanout line, and a second fanout line located at the side of first fanout line away from the base substrate; at least in the gluing area, the orthographic projection of the second fanout line on the base substrate substantially overlaps that of the first fanout line on the base substrate; in part of the area outside the gluing area, the size of an overlapping area between orthographic projections of the second fanout line and first fanout line on the base substrate in the direction perpendicular to the extension direction of the fanout lines is smaller than a first preset threshold.