Abstract: The present invention provides a pixel unit structure, in which a source electrode is connected to a data line in a thin film transistor; the gate electrode is connected to the gate line; the drain electrode is disposed on a side of the gate insulating layer away from the substrate; the metal oxide semiconductor layer is disposed on a side of the gate insulating layer away from the substrate, and includes a semiconductor portion and a first conductive portion and a second conductive portion respectively located on both sides of the semiconductor portion; a terminal of the first conductive portion adjacent to the drain electrode is connected to the drain electrode or serves as at least a portion of the drain electrode; and the second conductive portion is connected to the source electrode through a first via formed correspondingly on the gate insulating layer and the interlayer dielectric layer.

Abstract: At least one embodiment of the present disclosure provides a display panel, and the display panel includes: a first substrate and a second substrate oppositely combined with each other, the first substrate includes a base substrate, and a gate line, a first electrode, a first interlayer insulating layer, and second electrode on the base substrate; the first interlayer insulating layer includes a first via hole penetrating through the first interlayer insulating layer, the second electrode is electrically connected to the first electrode the first via hole, first support structure is provided in a region corresponding to the first via hole and on a side of the second electrode away from the base substrate; at least a part of the first support structure is located in the first via hole, an orthographic projection of the first via hole overlaps with an orthographic projection of the gate line on the base substrate.

Abstract: Provided is a substrate. The substrate includes a base substrate; and a plurality of sub-pixel structures arranged in an array on the base substrate, wherein the sub-pixel structure comprises: a thin film transistor disposed on the base substrate, the thin film transistor comprising a source and a drain; an insulating layer disposed on a side of the thin film transistor distal from the base substrate, a first via hole being formed in the insulating layer; a pixel electrode disposed on a side of the insulating layer distal from the base substrate, the pixel electrode being electrically connected to either the source or the drain through the first via hole; and a filling block disposed at the first via hole.

Abstract: An array substrate and a display panel. The array substrate includes: a base substrate; a gate line and a data line on the base substrate, the gate line intersect the data line to define a pixel region; a metal oxide thin film transistor is arranged in the pixel region, the metal oxide thin film transistor includes a metal oxide semiconductor layer; the metal oxide semiconductor layer includes a first part and a second part; the first part and the data line are connected through a first via hole; the first part is in a stripe shape; a first included angle is between extension directions of the first part and the data line; an orthographic projection of the second part overlap with an orthographic projection of the gate line on the base substrate and do not overlap with an orthographic projection of the data line on the base substrate.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. In the present disclosure, a first transistor group with oxide semiconductor as an active layer material is disposed on a side of a second transistor group with polysilicon as an active layer material away from the base, and an area enclosed by orthographic projections of the transistors in the first transistor group on the base is overlapped with an area enclosed by orthographic projections of the transistors in the second transistor group on the base. Stable performance of the transistors included can be ensured in a manufacturing process of the first transistor group and the second transistor group located in different layers, and at the same time, an area occupied by the driving circuit can be reduced so as to decrease a frame width of a display apparatus or improve resolution of the display apparatus.

Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.

Abstract: Embodiments of the present disclosure provide an array substrate and method for manufacturing same, a display panel, and a display device, and relate to the field of display technologies. The array substrate includes a color filter layer, such that a distance between a light source on a side, distal from the color filter layer, of the base substrate and the color filter layer is less. Thus, light from regions of the color resist blocks is avoided being emitted from adjacent color resist blocks, and a cross color of the display panel is further avoided, such that the display effect of the display panel is great. In addition, the color resist block is at least partially overlapped with a second portion of a metal oxide pattern in an oxide thin film transistor, such that an overall footprint of the oxide thin film transistor and the color filter layer can be reduced, so as to acquire the display panel of high PPI.

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes an active area and a non-active area located at the periphery of the active area, wherein the active area includes an opening area and a non-opening area. The displaying base plate includes a substrate and a thin-film transistor disposed on one side of the substrate, wherein the thin-film transistor includes a grid electrode, an active layer, a source-drain electrode and an auxiliary film layer, an excavation area is disposed on the auxiliary film layer, and an orthographic projection of the excavation area on the substrate at least partially covers the opening area.

Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.

Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.

Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.

Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display panel, and relates to the technical field of display. The array substrate comprises a first transistor arranged on one side of a substrate base, the first transistor being located in an active area of the array substrate; a flat layer covering the first transistor, the flat layer having a first through-hole; a first electrode layer arranged in the first through-hole, and being connected with a drain of the first transistor and having a first groove; a filling layer arranged in the first groove; and a second electrode layer arranged on a side, away from the first transistor, of the filling layer, the second electrode layer being connected with the first electrode layer. So an electric field for driving a liquid crystal layer is more uniform, thereby improving an aperture ratio of the display panel.