Patents by Inventor Binbin TONG

Binbin TONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103328
    Abstract: A displaying base plate and a manufacturing method thereof, and a displaying device. The displaying base plate includes a substrate, and a first electrode layer disposed on one side of the substrate, wherein the first electrode layer includes a first electrode pattern; a first planarization layer disposed on one side of the first electrode layer that is away from the substrate, wherein the first planarization layer is provided with a through hole, and the through hole penetrates the first planarization layer, to expose the first electrode pattern; and a second electrode layer, a second planarization layer and a third electrode layer that are disposed in stack on one side of the first planarization layer that is away from the substrate, wherein the second electrode layer is disposed closer to the substrate, the second electrode layer is connected to the first electrode pattern and the third electrode layer.
    Type: Application
    Filed: June 29, 2021
    Publication date: March 28, 2024
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Zhen Zhang, Fuqiang Li, Zhenyu Zhang, Yunping Di, Lizhong Wang, Zheng Fang, Jiahui Han, Yawei Wang, Chenyang Zhang, Chengfu Xu, Ce Ning, Pengxia Liang, Feihu Zhou, Xianqin Meng, Weiting Peng, Qiuli Wang, Binbin Tong, Rui Huang, Tianmin Zhou, Wei Yang
  • Publication number: 20230317740
    Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.
    Type: Application
    Filed: March 4, 2022
    Publication date: October 5, 2023
    Applicant: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lizhong Wang, Ce Ning, Yunping Di, Binbin Tong, Rui Huang, Tianmin Zhou, Wei Yang, Liping Lei
  • Publication number: 20220376137
    Abstract: A light-emitting diode (LED) chip includes a plurality of epitaxial structures, at least one first electrode, and a plurality of second electrodes. Any two adjacent epitaxial structures of the plurality of epitaxial structures have a gap therebetween. Each epitaxial structure includes a first semiconductor pattern, a light-emitting pattern and a second semiconductor pattern stacked in sequence. First semiconductor patterns in at least two of the plurality of epitaxial structures are connected to each other to form a first semiconductor layer. A first electrode is electrically connected to the first semiconductor layer. Each second electrode is electrically connected to the second semiconductor pattern in at least one of the plurality of epitaxial structures.
    Type: Application
    Filed: November 6, 2020
    Publication date: November 24, 2022
    Inventors: Mingxing WANG, Binbin TONG, Lizhen ZHANG, Chenyang ZHANG, Zhen ZHANG, Xiawei YUN, Guangcai YUAN, Xue DONG, Muxin DI, Zhiwei LIANG, Ke WANG, Zhanfeng CAO
  • Publication number: 20220276540
    Abstract: The disclosure provides an array substrate, a manufacturing method thereof and a display panel, and relates to the technical field of display. The array substrate comprises a first transistor arranged on one side of a substrate base, the first transistor being located in an active area of the array substrate; a flat layer covering the first transistor, the flat layer having a first through-hole; a first electrode layer arranged in the first through-hole, and being connected with a drain of the first transistor and having a first groove; a filling layer arranged in the first groove; and a second electrode layer arranged on a side, away from the first transistor, of the filling layer, the second electrode layer being connected with the first electrode layer. So an electric field for driving a liquid crystal layer is more uniform, thereby improving an aperture ratio of the display panel.
    Type: Application
    Filed: October 18, 2021
    Publication date: September 1, 2022
    Inventors: Lizhong WANG, Ce NING, Binbin TONG, Zhen ZHANG, Fuqiang LI, Zhenyu ZHANG