Patents by Inventor Bindu Lalitha

Bindu Lalitha has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Subsystem-based SoC integration
    Patent number: 10860762
    Abstract: Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: December 8, 2020
    Assignee: Intel Corpration
    Inventors: Robert P. Adler, Husnara Khan, Satish Venkatesan, Ramamurthy Sunder, Mukesh K. Mishra, Bindu Lalitha, Hassan M. Shehab, Sandhya Seshadri, Dhrubajyoti Kalita, Wendy Liu, Hanumanth Bollineni, Snehal Kharkar
  • SUBSYSTEM-BASED SOC INTEGRATION
    Publication number: 20190340313
    Abstract: Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.
    Type: Application
    Filed: July 11, 2019
    Publication date: November 7, 2019
    Applicant: Intel Corporation
    Inventors: Robert P. Adler, Husnara Khan, Satish Venkatesan, Ramamurthy Sunder, Mukesh K. Mishra, Bindu Lalitha, Hassan M. Shehab, Sandhya Seshadri, Dhrubajyoti Kalita, Wendy Liu, Hanumanth Bollineni, Snehal Kharkar