Abstract: A booting method is provided, applied to a computer system. The computer system includes a transmission interface, a power key, and a trigger element. The transmission interface includes a transmission specification and is electrically connected to a graphics card, and the power key is used for driving the computer system to perform a booting procedure. The booting method includes: detecting, in the booting procedure, whether the trigger element is triggered or not; and lowering the transmission specification and restarting the computer system when the trigger element is triggered. A computer system adopting the booting method is further provided.

Abstract: A booting method is provided, applied to a computer system. The computer system includes a transmission interface, a power key, and a trigger element. The transmission interface includes a transmission specification and is electrically connected to a graphics card, and the power key is used for driving the computer system to perform a booting procedure. The booting method includes: detecting, in the booting procedure, whether the trigger element is triggered or not; and lowering the transmission specification and restarting the computer system when the trigger element is triggered. A computer system adopting the booting method is further provided.

Abstract: A computer system management method including the following steps is provided. First, a target value and at least one input parameter are set. The target value and the at least one input parameter are related to at least one of a first data type and a second data type, and the first data type is related to the second data type. Then, a first algorithm is determined based on a third data type, and an input value of the third data type is calculated by using the first algorithm. The third data type is related to the first data type and the second data type. Afterward, a second algorithm is determined based on the target value, the at least one input parameter, and the input value, and an estimated value of the second data type is calculated by using the second algorithm. A computer system is also provided.

Abstract: A motherboard is provided. The motherboard includes a memory module, a processor and a memory slot. The memory module includes a first memory rank, a second memory rank, a plurality of first pins coupled to the first memory rank and a plurality of second pins coupled to the second memory rank. The processor includes a memory channel. The memory slot is coupled between the processor and the memory module, and is configured to transmit a first control signal from the memory channel to at least one of the plurality of first pins, or transmit a second control signal from the memory channel to at least one of the plurality of second pins. The first memory rank receives the first control signal through at least one of the plurality of first pins. The second memory rank receives the second control signal through at least one of the plurality of second pins.

Abstract: A computer system management method including the following steps is provided. First, a target value and at least one input parameter are set. The target value and the at least one input parameter are related to at least one of a first data type and a second data type, and the first data type is related to the second data type. Then, a first algorithm is determined based on a third data type, and an input value of the third data type is calculated by using the first algorithm. The third data type is related to the first data type and the second data type. Afterward, a second algorithm is determined based on the target value, the at least one input parameter, and the input value, and an estimated value of the second data type is calculated by using the second algorithm. A computer system is also provided.

Abstract: A motherboard is provided. The motherboard includes a memory module, a processor and a memory slot. The memory module includes a first memory rank, a second memory rank, a plurality of first pins coupled to the first memory rank and a plurality of second pins coupled to the second memory rank. The processor includes a memory channel. The memory slot is coupled between the processor and the memory module, and is configured to transmit a first control signal from the memory channel to at least one of the plurality of first pins, or transmit a second control signal from the memory channel to at least one of the plurality of second pins. The first memory rank receives the first control signal through at least one of the plurality of first pins. The second memory rank receives the second control signal through at least one of the plurality of second pins.

Abstract: An adaptive card is provided. The adaptive card is adapted to a motherboard with a connecting slot. The adaptive card includes a main body, a first connector, a second connector, a plurality of first fixing holes, a plurality of second fixing holes and a port. The main body includes a first surface, a second surface and a side edge. The first connector is configured on the first surface. The second connector is configured on the second surface. A plurality of first fixing holes are formed on the first surface and arranged along a direction corresponding to an insertion direction of the first connector. A plurality of second fixing holes are formed on the second surface and arranged along a direction corresponding to an insertion direction of the second connector. A port is configured on the side edge and used to be connected to the connecting slot.

Abstract: A motherboard of a computer is provided. The motherboard of a computer includes a main body, a notch formed at a side edge of the main body, an auxiliary device, and a fixing device formed adjacent to the notch to fix the auxiliary device in the notch, wherein the auxiliary device is a light guiding device including patterns.

Abstract: A motherboard an electronic device using the same are provided. The motherboard includes a motherboard and a control chip. The processor is adapted to be inserted to a processor base including a plurality of pins. The pins is divided to defined pins and undefined pins. The processor base includes a plurality of electrical contacts. A first part of the electrical contacts are corresponding to the defined pins, and a second part of the electrical contacts are corresponding to the undefined pins. The control chip determines whether to make the motherboard enter an overclocking operation mode according to a control command. When the motherboard is set to be at the overclocking operation mode, the control chip transmits a control signal to the undefined pins of the processor via the second part of the electrical contacts, and then the processor improves operating efficiency.

Abstract: An adaptive card is provided. The adaptive card is adapted to a motherboard with a connecting slot. The adaptive card includes a main body, a first connector, a second connector, a plurality of first fixing holes, a plurality of second fixing holes and a port. The main body includes a first surface, a second surface and a side edge. The first connector is configured on the first surface. The second connector is configured on the second surface. A plurality of first fixing holes are formed on the first surface and arranged along a direction corresponding to an insertion direction of the first connector. A plurality of second fixing holes are formed on the second surface and arranged along a direction corresponding to an insertion direction of the second connector. A port is configured on the side edge and used to be connected to the connecting slot.

Abstract: A motherboard is provided. The motherboard includes a main body, a notch formed at a side edge of the main body, and a fixing device formed adjacent to the notch to fix an auxiliary device. The function of the motherboard is expanded significantly while artistic of the appearance of the motherboard is improved.

Abstract: A motherboard including a socket and a memory slot is provided. The socket is adapted for disposing a processor with at least one memory channel, and each of the memory channels supports at least two memory cards. The memory slot is coupled to the socket and transmits signals from the memory channel. The memory slot includes a plurality of pins. A first part of the pins of the memory slot is assigned to transmit a signal from one of the memory cards supported by the memory channel, and a second part of the pins of the memory slot is assigned to transmit a signal from another one of the memory cards supported by the memory channel.

Abstract: A motherboard an electronic device using the same are provided. The motherboard includes a motherboard and a control chip. The processor is adapted to be inserted to a processor base including a plurality of pins. The pins is divided to defined pins and undefined pins. The processor base includes a plurality of electrical contacts. A first part of the electrical contacts are corresponding to the defined pins, and a second part of the electrical contacts are corresponding to the undefined pins. The control chip determines whether to make the motherboard enter an overclocking operation mode according to a control command. When the motherboard is set to be at the overclocking operation mode, the control chip transmits a control signal to the undefined pins of the processor via the second part of the electrical contacts, and then the processor improves operating efficiency.

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.

Abstract: A data processing system and an adjusting method thereof are disclosed. The data processing system includes a processor, a clock generator, a monitoring module and a determining module. When a target program is processed, the monitoring module monitors a first loading level of the processor, and transmits the first loading level to the determining module for recording. Furthermore, when a present program is processed, the monitoring module monitors a second loading level of the processor, and transmits the second loading level to the determining module. The determining module determines whether the second loading level matches with the first loading level within a preset period, and if it matches, the determining module generates and transmits a control signal to the clock generator, thereby making the clock generator generates a first clock signal to the processor, so as to increase the operating frequency of the processor.

Abstract: A method for setting an actual operation frequency of a memory is provided. The method includes the following steps. First, a memory model list is provided for selecting a memory model. Then, an estimation operation frequency of the memory is obtained according to the selected model. Finally, the operation frequency of a front side bus (FSB) is adjusted and cooperated with a frequency transformation ratio to generate the actual operation frequency of the memory according to the estimation operation frequency.

Abstract: A quantification indicating circuit includes an indicating lamp set, a converting circuit, and an indicating lamp control circuit. The indicating lamp set has a plurality of indicating lamps. The converting circuit has a plurality of predetermined threshold values which are compared with a numerical signal of a circuit board to generate a comparison result. The comparison result is converted to be outputs of a plurality of control bits. The indicating lamp control circuit is coupled between the indicating lamp set and the converting circuit and is used for controlling the number of the indicating lamps which are brightened according to the outputs of the control bits.