Patents by Inventor BING SHANG
BING SHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11955991Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: GrantFiled: April 18, 2022Date of Patent: April 9, 2024Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Publication number: 20220247430Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: ApplicationFiled: April 18, 2022Publication date: August 4, 2022Applicant: MICRON TECHNOLOGY, INC.Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Patent number: 11309919Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: GrantFiled: October 4, 2019Date of Patent: April 19, 2022Assignee: Micron Technology, Inc.Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Publication number: 20200036396Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: ApplicationFiled: October 4, 2019Publication date: January 30, 2020Applicant: MICRON TECHNOLOGY, INC.Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Patent number: 10447316Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: GrantFiled: December 19, 2014Date of Patent: October 15, 2019Assignee: Micron Technology, Inc.Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Patent number: 9703633Abstract: One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge the corrected first data word and the second data word responsive to a control signal to generate a final merged data word, and to provide the final merged data word to a write circuit. The apparatus also includes a second circuit configured to also receive the first and second data words, to preliminarily merge the first and second data words responsive to the control signal to generate an initial merged data word, to generate an initial parity code for the initial merged data word, to correct the initial parity code, and to provide the corrected parity code to the write circuit.Type: GrantFiled: September 8, 2015Date of Patent: July 11, 2017Assignee: Micron Technology, Inc.Inventors: Yu Zhang, Wei Bing Shang, En Peng Gao
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Publication number: 20160315639Abstract: Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed.Type: ApplicationFiled: December 19, 2014Publication date: October 27, 2016Inventors: Wei Bing Shang, Yu Zhang, Hong Wen Li, Yu Peng Fan, Zhong Lai Liu, En Peng Gao, Liang Zhang
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Patent number: 9441220Abstract: A method comprises: sorbing a sample solution comprising nucleic acids to a sample receiving portion of a quartz fiber filter by contacting the sample solution with the sample receiving portion; and washing the sample receiving portion while keeping most of nucleic acids around the sample receiving portion by flowing a wash solution through the sample receiving portion under a wicking force directed away from the sample receiving portion. An associated apparatus is also provided.Type: GrantFiled: December 20, 2012Date of Patent: September 13, 2016Assignee: General Electric CompanyInventors: Lin Chen, Bing Shang, Klaus Hochleitner, Rong Hou, Yanju Wang
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Publication number: 20150378826Abstract: One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge the corrected first data word and the second data word responsive to a control signal to generate a final merged data word, and to provide the final merged data word to a write circuit. The apparatus also includes a second circuit configured to also receive the first and second data words, to preliminarliy merge the first and second data words responsive to the control signal to generate an initial merged data word, to generate an initial parity code for the initial merged data word, to correct the initial parity code, and to provide the corrected parity code to the write circuit.Type: ApplicationFiled: September 8, 2015Publication date: December 31, 2015Inventors: YU ZHANG, Wei Bing Shang, En Peng Gao
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Publication number: 20150299693Abstract: A method comprises: sorbing a sample solution comprising nucleic acids to a sample receiving portion of a quartz fiber filter by contacting the sample solution with the sample receiving portion; and washing the sample receiving portion while keeping most of nucleic acids around the sample receiving portion by flowing a wash solution through the sample receiving portion under a wicking force directed away from the sample receiving portion. An associated apparatus is also provided.Type: ApplicationFiled: December 20, 2012Publication date: October 22, 2015Applicant: GENERAL ELECTRIC COMPANYInventors: LIN CHEN, BING SHANG, KLAUS HOCHLEITNER, RONG HOU, YANJU WANG
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Patent number: 9148176Abstract: One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge the corrected first data word and the second data word responsive to a control signal to generate a final merged data word, and to provide the final merged data word to a write circuit. The apparatus also includes a second circuit configured to also receive the first and second data words, to preliminarily merge the first and second data words responsive to the control signal to generate an initial merged data word, to generate an initial parity code for the initial merged data word, to correct the initial parity code, and to provide the corrected parity code to the write circuit.Type: GrantFiled: June 24, 2013Date of Patent: September 29, 2015Assignee: Micron Technology, Inc.Inventors: Yu Zhang, Wei Bing Shang, En Peng Gao
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Publication number: 20150089316Abstract: Circuits, apparatuses, and methods are disclosed for correcting data errors in integrated circuits. One example apparatus includes a first circuit configured to receive first and second data words, to correct one or more errors in the first data word, to merge the corrected first data word and the second data word responsive to a control signal to generate a final merged data word, and to provide the final merged data word to a write circuit. The apparatus also includes a second circuit configured to also receive the first and second data words, to preliminarily merge the first and second data words responsive to the control signal to generate an initial merged data word, to generate an initial parity code for the initial merged data word, to correct the initial parity code, and to provide the corrected parity code to the write circuit.Type: ApplicationFiled: June 24, 2013Publication date: March 26, 2015Applicant: MICRON TECHNOLOGY, INC.Inventors: Yu Zhang, Wei Bing Shang, En Peng Gao