Patents by Inventor Bing-Shun Yu

Bing-Shun Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7884472
    Abstract: A semiconductor package with a substrate ID code and its manufacturing method are revealed. A circuit and a solder mask are formed on the bottom surface of a substrate where the solder mask covers most of the circuit and a circuit-free zone of the substrate. A chip is disposed on the top surface of the substrate. A substrate ID code consisting of a plurality of laser marks is inscribed in the solder mask or in a portion of an encapsulant on the bottom surface away from the circuit to show the substrate lot number on the bottom surface. Therefore, quality control and failure tracking and management can easily be implemented by tracking the substrate ID code from the semiconductor package without changing the appearance of the semiconductor package. Furthermore, the substrate ID code can be implemented by the existing laser imprinting machines for semiconductor packaging processes and be formed at the same time of formation of a product code.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: February 8, 2011
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Ti Chen, Ching-Wei Hung, Bing-Shun Yu, Chin-Fa Wang
  • Publication number: 20090236739
    Abstract: A semiconductor package with a substrate ID code and its manufacturing method are revealed. A circuit and a solder mask are formed on the bottom surface of a substrate where the solder mask covers most of the circuit and a circuit-free zone of the substrate. A chip is disposed on the top surface of the substrate. A substrate ID code consisting of a plurality of laser marks is inscribed in the solder mask or in a portion of an encapsulant on the bottom surface away from the circuit to show the substrate lot number on the bottom surface. Therefore, quality control and failure tracking and management can easily be implemented by tracking the substrate ID code from the semiconductor package without changing the appearance of the semiconductor package. Furthermore, the substrate ID code can be implemented by the existing laser imprinting machines for semiconductor packaging processes and be formed at the same time of formation of a product code.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: POWERTECH TECHNOLOGY INC.
    Inventors: Chin-Ti CHEN, Ching-Wei HUNG, Bing-Shun YU, Chin-Fa WANG
  • Publication number: 20090236732
    Abstract: A thermal-enhanced multi-hole semiconductor package is revealed, primarily comprising a substrate with a plurality of alignment holes, a chip disposed on the substrate, an internal heat sink attached to the chip, and an encapsulant. The internal hear sink has a plurality of alignment bars and a heat dissipation surface. The alignment bars are inserted into the alignment holes, but not fully occupying the alignment holes to provide a plurality of flowing channels therein. The encapsulant completely encapsulates the alignment bars through filling the flowing channels. Therefore, the internal heat sink can be aligned to the substrate and is integrally connected with the chip and the substrate utilizing a small amount of adhesive or without any adhesive to form a composite having high rigidity and strong adhesion.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 24, 2009
    Inventors: Bing-Shun YU, Ching-Wei Hung
  • Patent number: 7564123
    Abstract: A semiconductor package primarily comprises a plurality of leadframe's leads, a chip, a paddle, an adhesive and an encapsulant encapsulating the components mentioned above. The paddle has a carrying surface and an exposed external surface. The first chip is attached to one surface of the leads. The paddle is attached to an opposing surface of the leads by the adhesive bonding the carrying surface to the leads. Furthermore, the adhesive further encapsulates the gaps between the leads without contaminating the exposed external surface and with the exposed external surface exposed from the encapsulant. Therefore, the leads obtain a better support so that the encapsulated portions of the leads will not shift nor expose from the encapsulant during molding processes without encapsulated bubbles between the leads and the paddle. The heat dissipation is also enhanced.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: July 21, 2009
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Fa Wang, Chin-Ti Chen, Bing-Shun Yu, Wan-Jung Hsieh
  • Patent number: 7549568
    Abstract: A method of forming an identification code for wire bonders is revealed. Firstly, a chip with a plurality of bonding pads is provided and is disposed on a chip carrier with a plurality of bonding fingers. A binary-code baseline is defined on the chip carrier to divide each of the bonding fingers into a first coding area adjacent the bonding pads and a second coding area far away from the bonding pads. Then, a plurality of bonding wires are formed by wire bonding to electrically connect the bonding pads to the bonding fingers and an ID code for wire bonders is formed at the same time where each bonding wire has an end selectively bonded to either the first coding area or the second coding area of the corresponding bonding finger to form an ID code for wire bonders. Since the ID code for wire bonders is constituted by the selected locations of the ends of the bonding wires, the ID code do not get lost or damaged during packaging processes nor contaminate the packages.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: June 23, 2009
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Ti Chen, Chin-Fa Wang, Bing-Shun Yu