Abstract: Technologies for hybrid virtualization and secure enclave include a computing device and an edge orchestrator. The edge orchestrator securely provisions a container-enclave policy to the computing device. A VMM of the computing device constructs a platform services enclave that includes the container-enclave policy. The platform services enclave requests a local attestation report from an application enclave, and the application enclave generates the attestation report using secure enclave support of a compute engine of the computing device. The attestation report is indicative of a virtualization context of the application enclave, and may include a VM flag, a VMM flag, and a source address of the application enclave. The platform services enclave enforces the container-enclave policy based on the virtualization context of the application enclave. The platform services enclave may control access to functions of the computing device based on the virtualization context.

Abstract: A pitch varying device, a pitch varying method and a pitch varying control device for a wind turbine blade and a wind turbine are provided. The blade pitch varying device includes: a disc-type driving structure perpendicular to an axis of a pitch bearing, a track surrounding the axis of the pitch bearing being provided on the disc-type driving structure; a first linear telescopic driving mechanism connected to the track through a first clamping member capable of clamping the track, and the first linear telescopic driving mechanism and the first clamping member being connected through a hinge connection; and a second linear telescopic driving mechanism connected to the track through a second clamping member capable of clamping the track, and the second linear telescopic driving mechanism and the second clamping member being connected through a hinge connection.

Abstract: An integrated electric booster braking system with a pedal force compensation function, comprising a booster motor, a first gear, a second gear, a lead screw, a brake master cylinder, a pedal push rod, a master cylinder push rod, a fluid storage tank, a hydraulic control unit and an electric control unit, wherein first gear and second gear are assembled in a housing, first gear is engaged with the second gear, the booster motor is connected with the first gear and drives the first gear to rotate, the first gear drives the second gear to rotate during rotation, the second gear is in threaded connection with the lead screw, the second gear drives the lead screw to move during rotation, the lead screw is of a hollow structure, and the rear end of the lead screw is abutted with the front end of a first piston in the brake master cylinder.

Abstract: Technologies for hybrid virtualization and secure enclave include a computing device and an edge orchestrator. The edge orchestrator securely provisions a container-enclave policy to the computing device. A VMM of the computing device constructs a platform services enclave that includes the container-enclave policy. The platform services enclave requests a local attestation report from an application enclave, and the application enclave generates the attestation report using secure enclave support of a compute engine of the computing device. The attestation report is indicative of a virtualization context of the application enclave, and may include a VM flag, a VMM flag, and a source address of the application enclave. The platform services enclave enforces the container-enclave policy based on the virtualization context of the application enclave. The platform services enclave may control access to functions of the computing device based on the virtualization context.

Abstract: Memory security technologies are described. An example processing device includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can determine that an exit condition to transfer control of a resource for a processor core from a first virtual machine monitor (VMM) to a second VMM has occurred. The processor core can also determine whether a control virtual machine control structure (VMCS) link pointer is valid. The processor core can also determine whether a reason value corresponding to the control VMCS link pointer is set. The processor core can also determine whether the reason value is set to zero. The processor core can also determining whether an exception bit corresponding to a specific exception type of a reason value is set. The processor core can also transfer a control of the resource from the first VMM to the second VMM.

Abstract: A processing system includes a first register to store an invalidation mode flag associated with a virtual processor identifier (VPID) and a processing core, communicatively coupled to the first register, the processing core comprising a logic circuit to execute a virtual machine monitor (VMM) environment, the VMM environment comprising a root mode VMM supporting a non-root mode VMM, the non-root mode VMM to execute a virtual machine (VM) identified by the VPID, the logic circuit further comprising an invalidation circuit to execute a virtual processor invalidation (INVVPID) instruction issued by the non-root mode VMM, the INVVPID instruction comprising a reference to an INVVPID descriptor that specifies a linear address and the VPID and responsive to determining that the invalidation mode flag is set, invalidate, without triggering a VM exit event, a memory address mapping associated with the linear address.

Abstract: The systems and methods for enabling a lightweight VMM to efficiently interrupt virtual machines are provided. In some examples, the lightweight VMM is configured to utilize a self IPI to deliver external interrupts to the virtual machines. The self IPI may be generated by writing one or more values, including an identifier of the external interrupt, to an ICR of a programmable interrupt controller. The programmable interrupt controller may retrieve the one or more values from the ICR, identify the external interrupt and process the external interrupt, which culminates in the external interrupt being written to an IDT of a virtual machine targeted for interrupt delivery by the lightweight VMM.

Abstract: The disclosure relates to a mounting frame, an energy storage unit, a pitch system, a wind turbine and a method. The mounting frame for mounting accumulators in a hub includes: a base having a predetermined thickness, wherein the base includes a mounting surface in a thickness direction of the base; and two or more accumulator mounting elements disposed on the mounting surface at intervals, wherein each accumulator mounting element includes a supporting assembly and a holding assembly connected to the supporting assembly, the supporting assembly is connected to the mounting surface and extends in the thickness direction, and the holding assembly is adapted to clamp and fix the accumulator such that all the accumulators in the hub are mounted to the mounting frame.

Abstract: The systems and methods for enabling a lightweight VMM to efficiently interrupt virtual machines are provided. In some examples, the lightweight VMM is configured to utilize a self IPI to deliver external interrupts to the virtual machines. The self IPI may be generated by writing one or more values, including an identifier of the external interrupt, to an ICR of a programmable interrupt controller. The programmable interrupt controller may retrieve the one or more values from the ICR, identify the external interrupt and process the external interrupt, which culminates in the external interrupt being written to an IDT of a virtual machine targeted for interrupt delivery by the lightweight VMM.

Abstract: An integrated electric booster braking system with a pedal force compensation function, comprising a booster motor, a first gear, a second gear, a lead screw, a brake master cylinder, a pedal push rod, a master cylinder push rod, a fluid storage tank, a hydraulic control unit and an electric control unit, wherein first gear and second gear are assembled in a housing, first gear is engaged with the second gear, the booster motor is connected with the first gear and drives the first gear to rotate, the first gear drives the second gear to rotate during rotation, the second gear is in threaded connection with the lead screw, the second gear drives the lead screw to move during rotation, the lead screw is of a hollow structure, and the rear end of the lead screw is abutted with the front end of a first piston in the brake master cylinder.

Abstract: The present disclosure provides an accidental-touch prevention method and apparatus for a mobile terminal. The method includes: receiving by the touch screen IC layer a touch instruction from a user, and reporting a touch point on a touch track corresponding to the touch instruction to the driver layer; determining by the driver layer whether a start point of the touch track falls within a pre-set accidental-touch prevention area; when the start point of the touch track falls within the pre-set accidental-touch prevention area, acquiring by the driver layer a distance on the touch track between a touch point after the start point and the start point, and performing accidental-touch prevention processing based on the distance.

Abstract: Disclosed herein are systems and methods of an emulation system. A hardware emulator of an emulation system includes a method of hardware emulation on a computer. The method may include reading in, by the computer, a hardware description language file and a low power intent file and compiling the hardware description language file and the low power intent file into an emulation image. Embodiments may include loading, the emulation image into an emulator, running, the emulation image under a test environment including using a coverage counter specific to low power coverage, created based on the hardware description language file and the low power intent file, using the coverage counters to inform the test environment, generating, by the computer, a report file including a set of low power coverage metrics based on a low power coverage data item, and presenting the report file to a user via a user interface.

Abstract: A method of an aspect includes receiving an indication of an attempt by a virtual machine to modify a paging structure identification storage location to have a given value. It is determined that the given value matches at least one of a set of one or more blacklist values. The attempt by the virtual machine to modify the paging structure identification storage location to have the given value is trapped to a virtual machine monitor. Other methods, apparatus, and systems are also disclosed.

Abstract: Technologies for hybrid virtualization and secure enclave include a computing device and an edge orchestrator. The edge orchestrator securely provisions a container-enclave policy to the computing device. A VMM of the computing device constructs a platform services enclave that includes the container-enclave policy. The platform services enclave requests a local attestation report from an application enclave, and the application enclave generates the attestation report using secure enclave support of a compute engine of the computing device. The attestation report is indicative of a virtualization context of the application enclave, and may include a VM flag, a VMM flag, and a source address of the application enclave. The platform services enclave enforces the container-enclave policy based on the virtualization context of the application enclave. The platform services enclave may control access to functions of the computing device based on the virtualization context.

Abstract: A processing system includes a first register to store an invalidation mode flag associated with a virtual processor identifier (VPID) and a processing core, communicatively coupled to the first register, the processing core comprising a logic circuit to execute a virtual machine monitor (VMM) environment, the VMM environment comprising a root mode VMM supporting a non-root mode VMM, the non-root mode VMM to execute a virtual machine (VM) identified by the VPID, the logic circuit further comprising an invalidation circuit to execute a virtual processor invalidation (INVVPID) instruction issued by the non-root mode VMM, the INVVPID instruction comprising a reference to an INVVPID descriptor that specifies a linear address and the VPID and responsive to determining that the invalidation mode flag is set, invalidate, without triggering a VM exit event, a memory address mapping associated with the linear address.

Abstract: A pitch varying device, a pitch varying method and a pitch varying control device for a wind turbine blade and a wind turbine are provided according to the present application. The blade pitch varying device includes: a disc-type driving structure perpendicular to an axis of a pitch bearing, a track surrounding the axis of the pitch bearing being provided on the disc-type driving structure; a first linear telescopic driving mechanism connected to the track through a first clamping member capable of clamping the track, and the first linear telescopic driving mechanism and the first clamping member being connected through hinge connection; and a second linear telescopic driving mechanism connected to the track through a second clamping member capable of clamping the track, and the second linear telescopic driving mechanism and the second clamping member being connected through hinge connection.

Abstract: Memory security technologies are described. An example processing device includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can determine that an exit condition to transfer control of a resource for a processor core from a first virtual machine monitor (VMM) to a second VMM has occurred. The processor core can also determine whether a control virtual machine control structure (VMCS) link pointer is valid. The processor core can also determine whether a reason value corresponding to the control VMCS link pointer is set. The processor core can also determine whether the reason value is set to zero. The processor core can also determining whether an exception bit corresponding to a specific exception type of a reason value is set. The processor core can also transfer a control of the resource from the first VMM to the second VMM.

Abstract: Memory security technologies are described. An example processing device includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can determine that an exit condition to transfer control of a resource for a processor core from a first virtual machine monitor (VMM) to a second VMM has occurred. The processor core can also determine whether a control virtual machine control structure (VMCS) link pointer is valid. The processor core can also determine whether a reason value corresponding to the control VMCS link pointer is set. The processor core can also determine whether the reason value is set to zero. The processor core can also determining whether an exception bit corresponding to a specific exception type of a reason value is set. The processor core can also transfer a control of the resource from the first VMM to the second VMM.

Abstract: A method, device and system disclosed used in storage technique, comprising: splitting a file of size M into k blocks, that is to say, each block is of size M/k; issuing the above k blocks across k different storage nodes in the distributed network storage system in a distributed manner; using the k blocks, constructing n?k independent blocks via linear coding method, and satisfying the property that any k of the n encoded blocks can be used to reconstruct the original data in the file, which means the linear coding method is a kind of Maximum-Distance Separable (MDS) code; distribute the n?k encoded blocks to the rest n?k different storage codes in the distributed network storage systems.

Abstract: The present disclosure provides an accidental-touch prevention method and apparatus for a mobile terminal. The method includes: receiving by the touch screen IC layer a touch instruction from a user, and reporting a touch point on a touch track corresponding to the touch instruction to the driver layer; determining by the driver layer whether a start point of the touch track falls within a pre-set accidental-touch prevention area; when the start point of the touch track falls within the pre-set accidental-touch prevention area, acquiring by the driver layer a distance on the touch track between a touch point after the start point and the start point, and performing accidental-touch prevention processing based on the distance.