Patents by Inventor Bing-Hong Wu

Bing-Hong Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data writing method, memory storage device and memory control circuit unit
    Patent number: 10942680
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.
    Type: Grant
    Filed: July 4, 2019
    Date of Patent: March 9, 2021
    Assignee: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Yi-Hsuan Lin, Bing-Hong Wu
  • DATA WRITING METHOD, MEMORY STORAGE DEVICE AND MEMORY CONTROL CIRCUIT UNIT
    Publication number: 20200371712
    Abstract: A data writing method, a memory storage device, and a memory control circuit unit are provided. The method includes: receiving a first data and writing the first data to at least one first physical programming unit of a first physical erasing unit; receiving a second data; temporarily storing the second data to a temporary storage area if a data length of the second data is less than a predefined value; receiving a third data; writing the third data to at least one second physical programming unit of the first physical erasing unit if a logical address storing the first data is consecutive with a logical address storing the third data; and moving the second data from the temporary storage area to at least one second physical programming unit of the first physical erasing unit if the logical address storing the first data is not consecutive with the logical address storing the third data.
    Type: Application
    Filed: July 4, 2019
    Publication date: November 26, 2020
    Applicant: PHISON ELECTRONICS CORP.
    Inventors: Ping-Chuan Lin, Yi-Hsuan Lin, Bing-Hong Wu