Abstract: A substrate cleaning apparatus has a remote source to remotely energize a hydrogen-containing gas to form an energized gas having a first ratio of ionic hydrogen-containing species to radical hydrogen-containing species. The apparatus has a process chamber with a substrate support, an ion filter to filter the remotely energized gas to form a filtered energized gas having a second ratio of ionic hydrogen-containing species to radical hydrogen-containing species, the second ratio being different than the first ratio, and a gas distributor to introduce the filtered energized gas into the chamber.

Abstract: A method for removing a reducible contaminant, such as an oxide or organic material, from a surface of a material layer comprises contacting an exposed dielectric layer with one or more suppressant species. The exposed dielectric layer and the material layer are contacted with the reducing species. Contacting the exposed dielectric layer with the suppressant species suppresses reactions between the exposed dielectric layer and the reducing species. Contacting the dielectric layer with the suppressant species may prevent the reducing gas from increasing the dielectric constant of the dielectric layer.

Abstract: A method for removing a reducible contaminant, such as an oxide or organic material, from a surface of a material layer comprises contacting an exposed dielectric layer with one or more suppressant species. The exposed dielectric layer and the material layer are contacted with the reducing species. Contacting the exposed dielectric layer with the suppressant species suppresses reactions between the exposed dielectric layer and the reducing species. Contacting the dielectric layer with the suppressant species may prevent the reducing gas from increasing the dielectric constant of the dielectric layer.

Abstract: A method and apparatus for Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

Abstract: Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

Abstract: The present disclosure pertains to our discovery that residual stress residing in a tantalum film or tantalum nitride film can be controlled (tuned) during deposition by adjusting at least two particular process variables which have counteracting effects on the residual film stress. By tuning individual film stresses within a film stack, it is possible to balance stresses within the stack. Process variables of particular interest include: power to the sputtering target process chamber pressure (i.e., the concentration of various gases and ions present in the chamber); substrate DC offset bias voltage (typically an increase in the AC applied substrate bias power); power to an ionization source (typically a coil); and temperature of the substrate upon which the film is deposited. The process chamber pressure and the substrate offset bias most significantly affect the film tensile and compressive stress components, respectively.

Abstract: A copper metallization structure and its method of formation in which a layer of a copper alloy, such as Cu—Mg or Cu—Al is deposited over a silicon oxide based dielectric layer and a substantially pure copper layer is deposited over the copper alloy layer. The copper alloy layer serves as a seed or wetting layer for subsequent filling of via holes and trenches with substantially pure copper. Preferably, the copper alloy is deposited cold in a sputter process, but, during the deposition of the pure copper layer or afterwards in a separate annealing step, the temperature is raised sufficiently high to cause the alloying element of the copper alloy to migrate to the dielectric layer and form a barrier there against diffusion of copper into and through the dielectric layer. This barrier also promotes adhesion of the alloy layer to the dielectric layer, thereby forming a superior wetting and seed layer for subsequent copper full-fill techniques.

Abstract: The invention provides a method for forming a microelectronic device comprising: forming a first electrode; depositing an adhesion layer over the first electrode utilizing high density plasma physical vapor deposition, wherein the adhesion layer comprises a material selected from Ta, TaNx, W, WNx, Ta/TaNx, W/WNx, and combinations thereof, depositing a dielectric layer over the adhesion layer; and forming a second electrode over the dielectric layer. The invention also provides a microelectronic device comprising: a first electrode; a second electrode; a dielectric layer disposed between the first and second electrodes; and an adhesion layer disposed between the first electrode and the dielectric layer, wherein the adhesion layer comprises a material selected from Ta, TaNx, W, WNx, Ta/TaNx, W/WNx, and combinations thereof.

Abstract: Internal surfaces of a vacuum chamber are coated with a metal or metal oxide to reduce pump down time and base pressure. The metal is sputter deposited within a partially assembled chamber from a target which comprises the metal. The chamber is then configured to process a substrate such as a silicon wafer.

Abstract: Metallization process sequences are provided for forming reliable interconnects including lines, vias and contacts. An initial barrier layer, such as Ta or TaN, is first formed on a patterned substrate followed by seed layer formed using high density plasma PVD techniques. The structure is then filled using either 1) electroplating, 2) PVD reflow, 3) CVD followed by PVD reflow, or 4) CVD.

Abstract: A copper via structure formed when copper and a small amount of an alloying metal such as magnesium or aluminum are cosputtered onto a substrate having oxide on at least a portion of its surface. Either the wafer is held at an elevated temperature during deposition or the sputtered film is annealed without the wafer being exposed to ambient. Due to the high temperature, the alloying metal diffuses to the surface. If a surface is exposed to a low partial pressure of oxygen or contacts silicon dioxide, the magnesium or aluminum forms a thin stable oxide but also extends into the oxide a distance of about 100 nm. The alloying metal oxide having a thickness of about 6 nm on the oxide sidewalls encapsulates the copper layer to provide a barrier against copper migration, to form an adhesion layer over silicon dioxide, and to act as a seed layer for the later growth of copper, for example, by electroplating.

Abstract: A copper metallization structure in which a layer of a copper alloy, such as Cu--Mg or Cu--Al is deposited over a silicon oxide based dielectric layer and a substantially pure copper layer is deposited over the copper alloy layer. The copper alloy layer serves as a seed or wetting layer for subsequent filling of via holes and trenches with substantially pure copper. Preferred examples of the alloying elements and their atomic alloying percentage include magnesium between 0.05 and 6% and aluminum between 0.05 and 0.3%. Further examples include boron, tantalum, tellurium, and titanium. Preferably, the copper alloy is deposited cold in a sputter process, but, during the deposition of the pure copper layer or afterwards in a separate annealing step, the temperature is raised sufficiently high to cause the alloying element of the copper alloy to migrate to the dielectric layer and form a barrier there against diffusion of copper into and through the dielectric layer.

Abstract: Copper and a small amount of an alloying metal such as magnesium or aluminum are cosputtered onto a substrate having oxide on at least a portion of its surface. Either the wafer is held at an elevated temperature during deposition or the sputtered film is annealed without the wafer being exposed to ambient. Due to the high temperature, the alloying metal diffuses to the surface. If a surface is exposed to a low partial pressure of oxygen or contacts silicon dioxide, the magnesium or aluminum forms a thin stable oxide. The alloying metal oxide encapsulates the copper layer to provide a barrier against copper migration, to form an adhesion layer over silicon dioxide, and to act as a seed layer for the later growth of copper, for example, by electroplating.