Patents by Inventor Bingzhi Su

Bingzhi Su has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11075306
    Abstract: Implementations of semiconductor packages may include: a wafer having a first side and a second side, a solder pad coupled to the first side of the wafer, a through silicon via (TSV) extending from the second side of the wafer to the solder pad a metal layer around the walls of the TSV, and a low melting temperature solder in the TSV. The low melting temperature solder may also be coupled to the metal layer. The low melting temperature solder may couple to the solder pad through an opening in a base layer metal of the solder pad.
    Type: Grant
    Filed: October 13, 2017
    Date of Patent: July 27, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Bingzhi Su
  • Patent number: 10770492
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Grant
    Filed: August 3, 2018
    Date of Patent: September 8, 2020
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
  • Publication number: 20190115482
    Abstract: Implementations of semiconductor packages may include: a wafer having a first side and a second side, a solder pad coupled to the first side of the wafer, a through silicon via (TSV) extending from the second side of the wafer to the solder pad a metal layer around the walls of the TSV, and a low melting temperature solder in the TSV. The low melting temperature solder may also be coupled to the metal layer. The low melting temperature solder may couple to the solder pad through an opening in a base layer metal of the solder pad.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 18, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Bingzhi SU
  • Publication number: 20180342549
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Application
    Filed: August 3, 2018
    Publication date: November 29, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi SU, Derek GOCHNOUR, Larry KINSMAN
  • Patent number: 10079254
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: September 18, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
  • Publication number: 20180019275
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Application
    Filed: August 11, 2017
    Publication date: January 18, 2018
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi SU, Derek GOCHNOUR, Larry KINSMAN
  • Patent number: 9754983
    Abstract: Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an outer wall having a second material coupled to the die; and a glass lid coupled to the die at the one or more inner walls and at the outer wall; wherein the outer wall may be located at the edge of the die and the glass lid and the one or more inner walls may be located within the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall; and wherein a modulus of the first material may be lower than a modulus of the second material.
    Type: Grant
    Filed: July 14, 2016
    Date of Patent: September 5, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Bingzhi Su, Derek Gochnour, Larry Kinsman
  • Patent number: 6768096
    Abstract: Passive thermal stabilization of a wavelength monitor includes shielding a wavelength dependent filter of the wavelength monitor from ambient cavity temperatures with portions extending from a submount supporting detectors for the wavelength monitor. The portions and the submount may constitute a single piece, or may be multiple pieces. The shield covers at least one surface of the wavelength dependent filter. The shield may include electrical interconnections for the detectors. A temperature detector may be provided on the submount or the shield portions. The submount or shield portions may be modeled and/or designed to have a section that tracks the thermal response of the wavelength dependent filter and the temperature detector may be mounted on that section.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: July 27, 2004
    Assignee: Digital Optics Corp.
    Inventors: John Barnett Hammond, Bingzhi Su
  • Publication number: 20030141438
    Abstract: Passive thermal stabilization of a wavelength monitor includes shielding a wavelength dependent filter of the wavelength monitor from ambient cavity temperatures with portions extending from a submount supporting detectors for the wavelength monitor. The portions and the submount may constitute a single piece, or may be multiple pieces. The shield covers at least one surface of the wavelength dependent filter. The shield may include electrical interconnections for the detectors. A temperature detector may be provided on the submount or the shield portions. The submount or shield portions may be modeled and/or designed to have a section that tracks the thermal response of the wavelength dependent filter and the temperature detector may be mounted on that section.
    Type: Application
    Filed: January 31, 2002
    Publication date: July 31, 2003
    Inventors: John Barnett Hammond, Bingzhi Su