Abstract: A method, medium and implementing processing system are provided in which the Operating System (OS) driver is divided into two parts, viz. an upper level OS driver and a lower level OS driver. The lower level OS driver sets up the adapter hardware and any adapter hardware work-around. The upper level OS driver is interfaced to the OS communication stack and each can be compiled separately. The upper OS driver is compiled and shipped with the OS to make sure it is compatible with the OS communication stack. The lower OS driver, in an exemplary embodiment, is compiled and stored in an adapter flash memory. The OS dynamically combines the upper and lower OS drivers together during the load time.

Abstract: A method and system for substantially avoiding loss of data and enabling continuing connection to the application during an MTU size changing operation in an active network computing device. Logic is added to the device driver, which logic provides several enhancements to the MTU size changing operation/process. Among these enhancements are: (1) logic for temporarily pausing the data coming in from the linked partner while changing the MTU size; (2) logic for returning a “device busy” status to higher-protocol transmit requests during the MTU size changing process. This second logic prevents the application from issuing new requests until the busy signal is removed; and (3) logic for enabling resumption of both flows when the MTU size change is completed. With this new logic, the device driver/adapter does not have any transmit and receive packets to process for a short period of time, while the MTU size change is ongoing.

Abstract: A method and system for substantially avoiding loss of data and enabling continuing connection to the application during an MTU size changing operation in an active network computing device. Logic is added to the device driver, which logic provides several enhancements to the MTU size changing operation/process. Among these enhancements are: (1) logic for temporarily pausing the data coming in from the linked partner while changing the MTU size; (2) logic for returning a “device busy” status to higher-protocol transmit requests during the MTU size changing process. This second logic prevents the application from issuing new requests until the busy signal is removed; and (3) logic for enabling resumption of both flows when the MTU size change is completed. With this new logic, the device driver/adapter does not have any transmit and receive packets to process for a short period of time, while the MTU size change is ongoing.

Abstract: A method and system for substantially avoiding loss of data and enabling continuing connection to the application during an MTU size changing operation in an active network computing device. Logic is added to the device driver, which logic provides several enhancements to the MTU size changing operation/process. Among these enhancements are: (1) logic for temporarily pausing the data coming in from the linked partner while changing the MTU size; (2) logic for returning a “device busy” status to higher-protocol transmit requests during the MTU size changing process. This second logic prevents the application from issuing new requests until the busy signal is removed; and (3) logic for enabling resumption of both flows when the MTU size change is completed. With this new logic, the device driver/adapter does not have any transmit and receive packets to process for a short period of time, while the MTU size change is ongoing.

Abstract: Expediting adapter failover may minimize network downtime and preserve network performance. Embodiments may comprise copying a primary adapter memory of a failing primary adapter to a standby adapter memory of a standby adapter. Copying the memory may expedite TCP/IP offload adapter failover by maintaining TCP/IP stack and connection information. In several embodiments, Copy Logic may copy primary adapter memory to standby adapter memory. In some embodiments, Detect Logic may monitor primary adapter viability and may initiate failover. In additional embodiments, Assess Logic may assess whether the IO bus is operative permitting Direct Logic to copy adapter memory via, e.g., DMA. In other embodiments, Packet Logic may fragment primary adapter memory into network packets sent through the network to the standby adapter where Unpack Logic may unpack them into memory.

Abstract: A method, system and computer program product for eliminating the latency in searching for contiguous memory space by an IO DMA request of a device driver. Three new application programming interfaces (APIs) are provided within the operating system (OS) code that allows the device driver(s) to (1) pre-request and pre-allocate the IO DMA address range from the OS during the IPL and maintain control of the address, (2) map a system (virtual/physical) address range to a specific pre-allocated IO DMA address range, and (3) free the pre-allocated IO DMA address space back to the kernel when the space is no longer required. Utilizing these APIs enables advanced IO DMA address mapping techniques maintained by the device drivers, and the assigned/allocated IO DMA address space is no longer fragmented, and the latency of completing the IO DMA mapping is substantially reduced/eliminated.

Abstract: A method, apparatus, and computer instructions for handling updates. A database is queried to determine an effect of the update on the data processing system in response to detecting an update for the data processing system. A configuration of the data processing system is used in querying the database. A health status of the data processing system is selectively modified using the response to form a modified health status in response to receiving a response from the database.

Abstract: A system and method for improving the efficiency of Message Signal Interrupts (MSI) in computer systems. The system utilizes the unused memory addresses in the MSI data payload to identify MSI transmit packets and to indicate the status of the interrupt without the need to further probe the device in order to determine the interrupt status.

Abstract: A method, medium and implementing processing system are provided in which the Operating System (OS) driver is divided into two parts, viz. an upper level OS driver and a lower level OS driver. The lower level OS driver sets up the adapter hardware and any adapter hardware work-around. The upper level OS driver is interfaced to the OS communication stack and each can be compiled separately. The upper OS driver is compiled and shipped with the OS to make sure it is compatible with the OS communication stack. The lower OS driver, in an exemplary embodiment, is compiled and stored in an adapter flash memory. The OS dynamically combines the upper and lower OS drivers together during the load time.

Abstract: A method, system, and computer program product are disclosed in a data processing system for avoiding data loss during network port recovery. A first network port is linked to a second network port via a network. The second network port transmits data to the first network port via the network. A determination is made that the first network port needs to be reinitialized. Prior to the first network port executing a re-initialization process, the first network port notifies the second network port to pause its data transmissions to the first network port.

Abstract: Methods and arrangements to monitor communication components such as a network adapters for activity, and identify components that have lower than normal levels of activity are provided. An identified communication component can become suspect component and a candidate for further testing, including different forms of interrogation. Process for interrogating candidates can include generating and sending test packets having the media access control (MAC) address of the candidate to the candidate and if activity is not detected subsequent to the interrogation, the candidate can be flagged as a failed component. Correspondingly, the component can be deactivated and removed from service. In a further embodiment, a backup component can be activated and assume the role previously held by the failed component.

Abstract: A method, system and computer program product for eliminating the latency in searching for contiguous memory space by an IO DMA request of a device driver. Three new application programming interfaces (APIs) are provided within the operating system (OS) code that allows the device driver(s) to (1) pre-request and pre-allocate the IO DMA address range from the OS during the IPL and maintain control of the address, (2) map a system (virtual/physical) address range to a specific pre-allocated IO DMA address range, and (3) free the pre-allocated IO DMA address space back to the kernel when the space is no longer required. Utilizing these APIs enables advanced IO DMA address mapping techniques maintained by the device drivers, and the assigned/allocated IO DMA address space is no longer fragmented, and the latency of completing the IO DMA mapping is substantially reduced/eliminated.

Abstract: A method and system for substantially avoiding loss of data and enabling continuing connection to the application during an MTU size changing operation in an active network computing device. Logic is added to the device driver, which logic provides several enhancements to the MTU size changing operation/process. Among these enhancements are: (1) logic for temporarily pausing the data coming in from the linked partner while changing the MTU size; (2) logic for returning a “device busy” status to higher-protocol transmit requests during the MTU size changing process. This second logic prevents the application from issuing new requests until the busy signal is removed; and (3) logic for enabling resumption of both flows when the MTU size change is completed. With this new logic, the device driver/adapter does not have any transmit and receive packets to process for a short period of time, while the MTU size change is ongoing.

Abstract: A peripheral component Interconnect (PCI) switch that has at least one control logic device that is capable of changing, on-demand, widths of dedicated buses is provided. The buses are PCI Express buses and thus, are composed of lanes. The control logic device is a lane enable register (LER). Each location in the LER corresponds to a lane of a dedicated bus and is used to enable or disable the corresponding lane. Consequently, widths of dedicated buses are changed by using the switch of the invention to add or subtract one or more lanes from the buses.

Abstract: A computer implemented method, apparatus, and computer usable program code for monitoring health of a data processing system. A determination is made whether a response is received within a first time period in response to an I/O device sending a receive descriptor to the data processing system. A determination is made whether a second time period passes before the receive descriptor becomes available for sending to the data processing system in response to an unavailability of the receive descriptor for sending by the I/O device to the data processing system. A health check is performed on the data processing system if the first time period passes without receiving a response. A health check is performed on the data processing system if the second time period passes without a receive descriptor becoming available to send the data processing system.

Abstract: A plurality of data packets encoded according to a first protocol are received which encapsulate data encoded according to a second protocol. A first source address is extracted from the packets according to the first protocol, it is determined whether or not the first source address is a substantial duplicate of a known assigned address. If it is a duplicate, a second source address is extracted from the encapsulated data according to the second protocol, and the first source address and said second source address are provided in an enhanced error log so that a system administrator may correct the duplicate assigned address. Enhanced embodiments of the invention included analysis of data encapsulated by a third, fourth and subsequent protocols, and automatic determination of each protocol encoding format.

Abstract: A method, apparatus and computer program product are provided for offloading functions to improve processor performance. A single LAN adapter is provided that allows for predefined functions to be offloaded to other devices. Different methods are described for offloading functions. First, users and applications may pick and choose, on demand, only the functions that are to be offloaded. Second, a scheduler schedules those functions that are to be offloaded through a predetermined scheduler. Third, functions may be offloaded based on heuristic or learning methods which are stored in a knowledge database.

Abstract: A method, apparatus, and computer instructions for handling updates. A database is queried to determine an effect of the update on the data processing system in response to detecting an update for the data processing system. A configuration of the data processing system is used in querying the database. A health status of the data processing system is selectively modified using the response to form a modified health status in response to receiving a response from the database.

Abstract: Method, system and computer program product for protecting the integrity of data transferred between an input/output bus of a data processing system and an external network. A method for protecting the integrity of data transferred between an input/output bus and a network includes generating a Cyclic Redundancy Check (CRC) value on an interface between the input/output bus and an adapter for data being transferred from the input/output bus to the network, and checking a CRC value on the interface between the input/output bus and the adapter for data being transferred from the network to the input/output bus. By adding a CRC generator and a CRC checker on the interface between the input/output bus and the adapter, end-to-end data integrity protection is provided for data transferred between the input/output bus and the network.

Abstract: A number of DMA addresses are resolved to system memory addresses at a time to decrease latency time. The number of addresses resolved at a time is preferably correlated to the number of DMA addresses that can be stored in a single cache line. Additionally, system memory is allocated in larger blocks that can store all of the information from the DMA addresses in a cache line. No change is required to the operating system, which can continue to operate on the page size it is set for. All changes are made in the hardware mapping programs and in the device driver software.