Patents by Inventor Binjian ZENG

Binjian ZENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11996454
    Abstract: A gate-last ferroelectric field effect transistor includes a substrate, isolation regions, a gate structure, a side wall spacer, source and drain regions, a first metal silicide layer and an interlayer dielectric layer which are sequentially arranged from bottom to top; the present disclosure further provides a manufacturing method of a gate-last ferroelectric field effect transistor; according to structural characteristics of the gate-last ferroelectric field effect transistor and crystalline characteristics of a hafnium oxide-based ferroelectric film, a dummy gate is first introduced in a manufacturing process of the gate-last ferroelectric field effect transistor; afterwards, high-temperature annealing is performed to make sure that an unannealed hafnium oxide-based film is crystallized to form a ferroelectric phase; finally the dummy gate is removed and a gate electrode layer is deposited to meet performance requirements of the gate-last ferroelectric field effect transistor; and the gate-last ferroelectr
    Type: Grant
    Filed: September 25, 2021
    Date of Patent: May 28, 2024
    Assignee: XIANGTAN UNIVERSITY
    Inventors: Min Liao, Binjian Zeng, Yichun Zhou, Jiajia Liao, Qiangxiang Peng, Yanwei Huan
  • Patent number: 11502083
    Abstract: A hafnium oxide-based ferroelectric field effect transistor includes a substrate, an isolation region arranged around the substrate; a gate structure including a buffer layer, a floating gate electrode, a hafnium oxide-based ferroelectric film layer, a control gate electrode and a film electrode layer which are sequentially stacked from bottom to top at a middle part of an upper surface of the substrate, a side wall arranged outside the gate structure, a source region and a drain region arranged oppositely at two sides of the gate structure and are formed by extending from an inner side of the isolation region to the middle part of the substrate, a first metal silicide layer formed by extending from the inner side of the isolation region to the side wall, and a second metal silicide layer arranged on an upper surface of the gate structure.
    Type: Grant
    Filed: September 25, 2021
    Date of Patent: November 15, 2022
    Assignee: XIANGTAN UNIVERSITY
    Inventors: Min Liao, Binjian Zeng, Yichun Zhou, Jiajia Liao, Qiangxiang Peng, Yanwei Huan
  • Publication number: 20220020855
    Abstract: A gate-last ferroelectric field effect transistor includes a substrate, isolation regions, a gate structure, a side wall spacer, source and drain regions, a first metal silicide layer and an interlayer dielectric layer which are sequentially arranged from bottom to top; the present disclosure further provides a manufacturing method of a gate-last ferroelectric field effect transistor; according to structural characteristics of the gate-last ferroelectric field effect transistor and crystalline characteristics of a hafnium oxide-based ferroelectric film, a dummy gate is first introduced in a manufacturing process of the gate-last ferroelectric field effect transistor; afterwards, high-temperature annealing is performed to make sure that an unannealed hafnium oxide-based film is crystallized to form a ferroelectric phase; finally the dummy gate is removed and a gate electrode layer is deposited to meet performance requirements of the gate-last ferroelectric field effect transistor; and the gate-last ferroelectr
    Type: Application
    Filed: September 25, 2021
    Publication date: January 20, 2022
    Applicant: XIANGTAN UNIVERSITY
    Inventors: Min LIAO, Binjian ZENG, Yichun ZHOU, Jiajia LIAO, Qiangxiang PENG, Yanwei HUAN
  • Publication number: 20220020747
    Abstract: A hafnium oxide-based ferroelectric field effect transistor includes a substrate, an isolation region arranged around the substrate; a gate structure including a buffer layer, a floating gate electrode, a hafnium oxide-based ferroelectric film layer, a control gate electrode and a film electrode layer which are sequentially stacked from bottom to top at a middle part of an upper surface of the substrate, a side wall arranged outside the gate structure, a source region and a drain region arranged oppositely at two sides of the gate structure and are formed by extending from an inner side of the isolation region to the middle part of the substrate, a first metal silicide layer formed by extending from the inner side of the isolation region to the side wall, and a second metal silicide layer arranged on an upper surface of the gate structure.
    Type: Application
    Filed: September 25, 2021
    Publication date: January 20, 2022
    Applicant: XIANGTAN UNIVERSITY
    Inventors: Min LIAO, Binjian ZENG, Yichun ZHOU, Jiajia LIAO, Qiangxiang PENG, Yanwei HUAN