Abstract: A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Abstract: A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Abstract: A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Abstract: A chip assembly includes a chip, a paddle, an interface layer, a frequency extending device, and lands. The chip has contacts. The interface layer is disposed between the chip and the paddle. The frequency extending device has at least a conductive layer and a dielectric layer. The conductive layer has conductive traces. The frequency extending device is disposed adjacent to the side of the chip and overlying the paddle. The lands are disposed adjacent to the side of the paddle. The contacts are connected to the conductive traces. The conductive traces are connected to the lands. The frequency extending device is configured to reduce impedance discontinuity such that the impedance discontinuity produced by the frequency extending device is less than an impedance discontinuity that would be produced by bond wires each having a length greater than or substantially equal to the distance between the contacts and the lands.

Abstract: Methods and apparatus for providing connection packages for high-speed integrated circuits (“ICs”) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density IC's input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced.

Abstract: A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications. The power amplifier module, or also frequently referred to as modulator driver module, comprises amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency. A power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply.

Abstract: Methods and apparatus for providing connection packages for high-speed integrated circuits (“ICs”) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density IC's input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced. A portion of the coupled microstrips near the IC pads can be widened to increase the capacitance so that the overall transmission path can become an all-pass network—from the IC pads, through the bonding wires, to the microstrips.

Abstract: Connection packages for high-speed integrated circuits (“ICs”) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density IC's input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced. A portion of the coupled microstrips near the IC pads can be widened to increase the capacitance so that the overall transmission path can become an all-pass network—from the IC pads, through the bonding wires, to the microstrips.

Abstract: Methods and apparatus for generating clock signals accurately locked to multi-gigabits-per-second data signals received over fiber optic channels are disclosed. The invention includes a phase detector for comparing a data signal and a clock signal, a one shot unit for detecting a data transition, an XOR, a filter, a main charge pump, a compensating charge pump for producing additive or compensating current, and a VCO for generating the clock signal. The phase detector includes multiple D-flip flops. The one shot unit includes a delay unit and an AND gate. The filter includes a resistor, a capacitor and a negative resistance amplifier. The main charge pump includes differential inputs, double outputs, cross-quading resistors, differential NPN input transistors, and a current source. The compensating charge pump includes differential NPN input transistors and a current source.

Abstract: Methods and apparatus for generating clock signals accurately locked to multi-gigabits-per-second data signals received over fiber optic channels are disclosed. The invention includes a phase detector for comparing a data signal and a clock signal, a one shot unit for detecting a data transition, an XOR, a filter, a main charge pump, a compensating charge pump for producing additive or compensating current, and a VCO for generating the clock signal. The phase detector includes multiple D-flip flops. The one shot unit includes a delay unit and an AND gate. The filter includes a resistor, a capacitor and a negative resistance amplifier. The main charge pump includes differential inputs, double outputs, cross-quading resistors, differential NPN input transistors, and a current source. The compensating charge pump includes differential NPN input transistors and a current source.

Abstract: A superconducting gyroscope of the present invention includes a circuit which produces a magnetic field which is synchronous with the rate of rotation experienced by the gyroscope, a sensing circuit for converting the synchronous magnetic field into an electric signal, a first shield made of superconducting material for performing shielding of external stray fields, and a second shield disposed inside the first shield and made of superconducting material for expelling trapped residual magnetic flux. The synchronous magnetic field producing circuit includes a magnetic core shaped in a toroid with an air gap. The magnetic core may alternatively be formed in meandering shape by a plurality of separate magnetic core members with a plurality of air gaps therebetween. The sensing circuit includes at least one SQUID which can be directly coupled to the magnetic core.

Abstract: A multilayered integrated circuit chip carrier has a top layer, a signal line layer, a ground layer, a power conductor layer, and a bottom layer with a separating layer between adjacent layers. Each layer has coplanar conductive and dielectric portions, the separating layers being primarily dielectric. The top layer supports an integrated circuit chip and signal launcher pads on the bottom layer couple signal and power lines of a printed circuit board to spaced points about the bottom layer periphery and substantially constant signal line impedance is achieved. The signal line layer is separated from the power conductor layer by a ground plane layer. Conductive via through pads are placed in the separating layers to form a plurality of separate conductive paths from each of the bottom and top layers to each of the signal line and power conductor layers.

Abstract: Coaxial cables each having a cylindrical electrically conductive outer shield and a central conductive wire insulated from the shield are conductively coupled through a connector to coplanar conductors on a dielectric substrate. The conductors converge toward an opening in the substrate. The coplanar conductors alternately are ground and signal conductors. Each coaxial cable shield is conductively coupled to two ground conductors and the cable wire is conductively coupled to the signal conductor between the two ground conductors. At the substrate opening the ground and signal conductors are conductively coupled to planar stripline waveguide ground and signal blades, respectively. Ground blades between the signal blades are a factor in controlling the signal blade impedance and provide isolation between the signal blades. Each blade is perpendicular to the substrate and has a pitch angle such that the blade extends through the opening below the substrate.

Abstract: A surface acoustic wave infrared line imaging array having a first interdigital transducer generating a first surface acoustic wave train amplitude modulated by the temperature profile of the substrate in response to a line segment of a received infrared image, a second interdigital transducer generating a parallel reference surface acoustic wave train, equal in amplitude but 180.degree. out of phase with said first surface acoustic wave train, and a third interdigital transducer for summing the amplitudes of said first and reference surface acoustic wave trains to generate a wave train signal in which the individual waves are amplitude modulated in accordance with the intensity profile of the line segment of the infrared image received by the substrate underlying the first interdigital transducer.

Abstract: An improved detection circuit for an ion mass air flow sensor having a feedback circuit from the differential output of the sensor to the regulatory input of the high voltage supply. The feedback signal provides a second order correction to the output voltage of the high voltage power supply. This second order correction of high voltage power supply output voltage compensates the differential output of the sensor as a function of the airflow's pressure.

Abstract: A surface acoustic wave gyroscope which detects a change in the propagation velocity of a surface acoustic wave as a function of the rotational velocity of a medium on whose surface the acoustic wave is propogated, is disclosed. In a first embodiment using a fixed frequency oscillator to generate the surface acoustic wave, the change in the propagation velocity is detected as a phase shift between the generated and detected waves. In an alternate embodiment the detected surface acoustic wave is used as a feedback signal to an amplifier to form an oscillator whose frequency varies as a function of the surface waves propagation velocity. In the preferred embodiment, two surface acoustic waves are generated in opposite directions about the cylindrical surface of a substrate.

Abstract: A pressure-sensing capacitor and a method for trimming the capacitor is disclosed. The capacitor includes a pair of spaced flexible parallel quartz plates. A thin circular layer of conductive metal is formed on the opposing inner surfaces of the plates to define the electrodes of the capacitor. A glass frit sealing compound, forming a concentric ring about the conductive layers, is disposed between the plates to seal the evacuated space between the plates. The thickness of the ring is small enough so that the capacitance between the electrodes is higher by an unknown amount than the desired value of capacitance at every point in the range of variation of the value of pressure. The capacitor is trimmed by first measuring the capacitance value at zero pressure and also at a maximum pressure. The size and location of a path on one of the electrodes is computed from the measured capacitance values and the deflection characteristics of the plates.

Abstract: A pressure-sensing capacitor and a method for trimming the capacitor is disclosed. The capacitor includes a pair of spaced flexible parallel quartz plates. A thin circular layer of conductive metal is formed on the opposing inner surfaces of the plates to define the electrodes of the capacitor. A glass frit sealing compound, forming a concentric ring about the conductive layers, is disposed between the plates to seal the evacuated space between the plates. The thickness of the ring is small enough so that the capacitance between the electrodes is higher by an unknown amount than the desired value of capacitance at every point in the range of variation of the value of pressure. The capacitor is trimmed by first measuring the capacitance value at zero pressure and also at a maximum pressure. The size and location of a path on one of the electrodes is computed from the measured capacitance values and the deflection characteristics of the plates.

Abstract: An improved pycnometer in which the sample whose volume to be measured is put in a closed chamber to which an electro-mechanical transducer is coupled. The transducer is excited at a constant frequency. The change in impedance of the transducer is then read as a function of the volume of the sample.