Abstract: A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.

Abstract: A method is provided for forming microelectronic devices. This may include providing a wafer device having metallization layers, a plurality of integrated circuits and a channel area provided around each of the integrated circuits. Materials from within each channel area may be removed by etching or by laser to form an air gap around a perimeter of each integrated circuit. Each air gap may prevent cracking and/or delamination problems caused by a subsequent dicing of the wafer device by a wafer saw into a plurality of devices.

Abstract: A method of forming an isolation structure in a semiconductor substrate is described. A trench is first etched into a semiconductor substrate. The trench is subjected to a nitrogen-oxide gas ambient and is annealed to form a silicon-oxynitride surface along the trench sidewalls. A first oxide layer is then formed within the trench. The first oxide layer is subjected to a nitridation step and is annealed to form an oxy-nitride surface on the first oxide layer and a silicon-oxynitride interface between the first oxide layer and the semiconductor substrate. A second oxide layer is then deposited over the oxy-nitride surface of the first oxide layer. The method and isolation structure of the present invention reduce dopant outdiffusion, reduce trench stresses, allow more uniform growth of thin gate oxides, and permit the use of thinner gate oxides.