Patents by Inventor Bipul Agarwal
Bipul Agarwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10056880Abstract: Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a DSA includes a plurality of DSA stages that can be set in an attenuation mode or in a bypass mode using a plurality of switching circuits. A first switching circuit of the plurality of switching circuits includes a field effect transistor (FET) switch, a gate resistor, one or more gate resistor bypass switches, and a pulse generation circuit. The gate resistor is electrically connected between a switch control input and a gate of the FET switch, and a switch control signal can be provided to the switch control input to turn on or off the FET switch. In response to detecting a rising and/or falling edge of the switch control signal, the pulse generation circuit can control the one or more gate resistor bypass switches to bypass the gate resistor.Type: GrantFiled: August 16, 2017Date of Patent: August 21, 2018Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
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Publication number: 20180183477Abstract: Aspects of this disclosure relate to reducing insertion loss associated with a bypass path. In an embodiment, an apparatus includes a first switch having at least two throws, a second switch having at least two throws, a bypass path between the first switch and the second switch, and at least one inductor. The at least one inductor is configured to compensate for capacitance associated with the bypass path to cause insertion loss of the bypass path to be reduced.Type: ApplicationFiled: November 10, 2017Publication date: June 28, 2018Inventors: Junhyung Lee, Bipul Agarwal, Yong Hee Lee, Junwon Heo
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Publication number: 20180175797Abstract: Disclosed herein are signal amplifiers having a plurality of amplifier cores. Individual amplifier cores can be designed for particular gain modes to enhance particular advantages while reducing other disadvantages. The signal amplifier can then switch between amplifier cores when switching gain modes to achieve desired performance characteristics (e.g., improving noise figure or linearity). Examples of signal amplifiers disclosed herein include amplifier architectures with a high gain amplifier core that reduces the noise figure and a linearity boost amplifier core that increases linearity (e.g., for lower gain modes). The disclosed signal amplifiers can also have switchable reference biases to provide targeted bias current matching. The disclosed signal amplifiers can also include degeneration switching blocks for individual amplifier cores to improve signal linearity.Type: ApplicationFiled: December 20, 2017Publication date: June 21, 2018Inventors: Junhyung Lee, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
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Publication number: 20180062690Abstract: Described herein are variable gain amplifiers that selectively provide variable or tailored impedances at a degeneration block and/or feedback block depending at least in part on a gain mode of the variable gain amplifier. This advantageously reduces or eliminates performance penalties in one or more gain modes. The variable impedances can be configured to improve linearity of the amplification process in targeted gain modes. The variable gain amplifier can be configured to provide a low-loss bypass mode in a low gain mode to improve signal quality.Type: ApplicationFiled: August 30, 2017Publication date: March 1, 2018Inventors: Johannes Jacobus Emile Maria Hageraats, Junhyung Lee, Joshua Haeseok Cho, Aravind Kumar Padyana, Bipul Agarwal
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Publication number: 20180062600Abstract: Described herein are variable gain amplifiers and multiplexers that embed programmable attenuators into switchable paths that allow signals in a high gain mode to bypass attenuation. This advantageously reduces or eliminates performance penalties in the high gain mode. The programmable attenuators can be configured to improve linearity of the amplification process through pre-LNA attenuation in targeted gain modes. In addition, described herein are variable gain amplifiers with embedded attenuators in a switching network. The attenuators can be embedded onto switches and can be configured to have little or no effect on a noise factor in a high gain mode because the switching network can provide an attenuation bypass in a high gain mode and an attenuation in other gain modes. The programmable attenuators can be embedded onto a multi-input LNA architecture.Type: ApplicationFiled: August 30, 2017Publication date: March 1, 2018Inventors: Junhyung LEE, Rimal Deep Singh, Johannes Jacobus Emile Maria Hageraats, Joshua Haeseok Cho, Bipul Agarwal, Aravind Kumar Padyana
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Patent number: 9893752Abstract: Diversity receiver front end system with variable-gain amplifiers. A receiving system can include a controller configured to selectively activate one or more of a plurality of paths between an input of a first multiplexer and an output of a second multiplexer. The receiving system can further include a plurality of bandpass filters, each one of the plurality of bandpass filters disposed along a corresponding one of the plurality of paths and configured to filter a signal received at the bandpass filter to a respective frequency band. The receiving system can further include a plurality of variable-gain amplifiers (VGAs), each one of the plurality of VGAs disposed along a corresponding one of the plurality of paths and configured to amplify a signal received at the VGA with a gain controlled by an amplifier control signal received from the controller.Type: GrantFiled: June 1, 2015Date of Patent: February 13, 2018Assignee: SKYWORKS SOLUTIONS, INC.Inventors: William J. Domino, Stephane Richard Marie Wloczysiak, Bipul Agarwal
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Publication number: 20180034445Abstract: Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a DSA includes a plurality of DSA stages that can be set in an attenuation mode or in a bypass mode using a plurality of switching circuits. A first switching circuit of the plurality of switching circuits includes a field effect transistor (FET) switch, a gate resistor, one or more gate resistor bypass switches, and a pulse generation circuit. The gate resistor is electrically connected between a switch control input and a gate of the FET switch, and a switch control signal can be provided to the switch control input to turn on or off the FET switch. In response to detecting a rising and/or falling edge of the switch control signal, the pulse generation circuit can control the one or more gate resistor bypass switches to bypass the gate resistor.Type: ApplicationFiled: August 16, 2017Publication date: February 1, 2018Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
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Patent number: 9866202Abstract: Digitally controlled attenuators with low phase shift are provided herein. In certain configurations, a digitally controlled attenuator includes an attenuation circuit electrically connected between an input terminal and an output terminal, a bypass circuit electrically connected in parallel with the attenuation circuit between the input terminal and the output terminal, and a plurality of phase compensation capacitors including a first phase compensation capacitor and a second phase compensation capacitor electrically connected in series between the input terminal and the output terminal. The bypass circuit is configured to receive a mode control signal for selecting the bypass circuit to control an amount of attenuation between the input terminal and the output terminal. Additionally, the phase compensation capacitors are operable to compensate for a phase difference between a first signal path through the attenuation circuit and a second signal path through the bypass circuit.Type: GrantFiled: January 18, 2017Date of Patent: January 9, 2018Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
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Patent number: 9847804Abstract: Aspects of this disclosure relate to reducing insertion loss associated with a bypass path. In an embodiment, an apparatus includes a first switch having at least two throws, a second switch having at least two throws, a bypass path between the first switch and the second switch, and at least one inductor. The at least one inductor is configured to compensate for capacitance associated with the bypass path to cause insertion loss of the bypass path to be reduced.Type: GrantFiled: April 3, 2015Date of Patent: December 19, 2017Assignee: Skyworks Solutions, Inc.Inventors: Junhyung Lee, Bipul Agarwal, Yong Hee Lee, Junwon Heo
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Patent number: 9825660Abstract: Systems, devices and methods related to diversity receivers. In some embodiments, a receiving system can include a controller configured to selectively activate one or more of a plurality of paths between an input and an output, and a plurality of amplifiers, with each one of the plurality of amplifiers disposed along a corresponding one of the plurality of paths and configured to amplify a signal received at the amplifier. The receiving system can further include two or more of features including (a) variable-gain amplifiers, (b) phase-shifting components, (c) impedance matching components, (d) post-amplifier filters, (e) a switching network, and (f) flexible band routing. In some embodiments, such a receiving system can be implemented as a diversity receive (DRx) module.Type: GrantFiled: April 26, 2016Date of Patent: November 21, 2017Assignee: Skyworks Solutions, Inc.Inventors: Stephane Richard Marie Wloczysiak, William J. Domino, Bipul Agarwal
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Patent number: 9813137Abstract: Diversity receiver front end system with flexible band routing. A receiving system can include a plurality of amplifiers, each one of the plurality of amplifiers disposed along a corresponding one of a plurality of paths between an input of the receiving system and an output of the receiving system and configured to amplify a radio-frequency (RF) signal received at the amplifier. The receiving system can further include an input multiplexer configured to receive one or more RF signals at one or more input multiplexer inputs and to output each of the one or more RF signals to one or more of a plurality of input multiplexer outputs to propagate along a respective one or more of the plurality of paths.Type: GrantFiled: August 26, 2015Date of Patent: November 7, 2017Assignee: Skyworks Solutions, Inc.Inventors: Stephane Richard Marie Wloczysiak, William J. Domino, Bipul Agarwal
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Publication number: 20170317710Abstract: Described herein are radio-frequency (RF) modules that include shielding for improved RF performance. The RF modules including a packaging substrate with a receiving system implemented thereon. The RF module includes a shield implemented to provide RF shielding for at least a portion of the receiving system. The receiving system can include any combination of pre-amplifier or post-amplifier bandpass filters, amplifiers, switching networks, impedance matching components, phase-shifting components, input multiplexers, and output multiplexers. The shielding can include a conductive layer within a conformal shielding on an upper side and side walls of the RF module. The shielding can be an overmold formed over the packaging substrate. The conductive layer can be connected to one or more ground planes. The packaging substrate can include contact features on an underside of the substrate for mounting an underside component.Type: ApplicationFiled: April 28, 2017Publication date: November 2, 2017Inventors: Yi LIU, Anthony James LOBIANCO, Matthew Sean READ, Hoang Mong NGUYEN, Howard E. Chen, Stephane Richard Marie WLOCZYSIAK, William J. DOMINO, Bipul AGARWAL
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Patent number: 9806787Abstract: Diversity receiver front end system with flexible antenna routing. A receiving system can include a plurality of amplifiers. Each one of the plurality of amplifiers can be disposed along a corresponding one of a plurality of paths between an input of the receiving system and an output of the receiving system. Each one of the plurality of paths can correspond to a different frequency band. The receiving system can include an input multiplexer configured to receive, at one or more of a plurality of input multiplexer inputs, one or more RF signals. Each one of the one or more RF signals can include one or more frequency bands. The input multiplexer can be configured to output each of the one or more RF signals to one or more of a plurality of input multiplexer outputs.Type: GrantFiled: November 18, 2015Date of Patent: October 31, 2017Assignee: Skyworks Solutions, Inc.Inventors: Stephane Richard Marie Wloczysiak, William J. Domino, Bipul Agarwal
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Patent number: 9787305Abstract: Apparatus and methods for PIN diode switches for radio frequency electronic systems are provided herein. In certain configurations, a packaged switch including a packaging substrate including a die paddle and a thermally conductive substrate attached to the die paddle, one or more PIN diode switches attached to the thermally conductive substrate, and a driver chip attached to the die paddle and configured to generate a plurality of bias voltages operable to control biasing of the one or more PIN diode switches. The driver chip includes a switching regulator configured to generate a first bias voltage of the plurality of bias voltages and a charge pump configured to generate a second bias voltage of the plurality of bias voltages.Type: GrantFiled: December 13, 2016Date of Patent: October 10, 2017Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Wei Liu, Bipul Agarwal, Richard Mark Puente
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Patent number: 9787285Abstract: Apparatus and methods for digital step attenuators are provided herein. In certain configurations, a DSA includes a plurality of DSA stages that can be set in an attenuation mode or in a bypass mode using a plurality of switching circuits. A first switching circuit of the plurality of switching circuits includes a field effect transistor (FET) switch, a gate resistor, one or more gate resistor bypass switches, and a pulse generation circuit. The gate resistor is electrically connected between a switch control input and a gate of the FET switch, and a switch control signal can be provided to the switch control input to turn on or off the FET switch. In response to detecting a rising and/or falling edge of the switch control signal, the pulse generation circuit can control the one or more gate resistor bypass switches to bypass the gate resistor.Type: GrantFiled: September 14, 2016Date of Patent: October 10, 2017Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
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Patent number: 9787467Abstract: Apparatus and methods for adjusting a gain of an electronic oscillator, such as a voltage-controlled oscillator (VCO), are disclosed. In one aspect, an apparatus for compensating for VCO gain variations includes a charge pump controller. The charge pump controller can be configured to select a VCO gain model based on a comparison of a VCO gain indicator and a threshold value stored in a memory, obtain VCO gain model parameters from the memory corresponding to the selected VCO gain model, and compute a charge pump current control value using the VCO gain model parameters. The charge pump current control value can be used to compensate for VCO gain variations.Type: GrantFiled: August 19, 2016Date of Patent: October 10, 2017Assignee: Skyworks Solutions, Inc.Inventors: Thomas Obkircher, Bipul Agarwal, Wei-Hong Chen
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Patent number: 9755577Abstract: A power amplifier circuit includes an amplifier MOSFET and a predistorter MOSFET. The predistorter MOSFET source and drain are connected together, and the predistorter MOSFET is connected between the gate of the amplifier MOSFET and a second bias voltage signal. This biasing of the predistorter MOSFET causes it to provide a nonlinear capacitance at the gate of the amplifier MOSFET. The combined non-linear capacitances of the amplifier MOSFET and predistorter MOSFET provide predistortion that promotes cancellation of the distortion or nonlinearity contributed by the amplifier MOSFET alone.Type: GrantFiled: December 18, 2015Date of Patent: September 5, 2017Assignee: Skyworks Solutions, Inc.Inventors: Hamid R. Amir Firouzkouhi, Bipul Agarwal, Hasan Akyol
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Patent number: 9654122Abstract: A fractional-N divider of a frequency synthesizer is driven by a dither-less and seed-less multi-stage noise shaping (MASH) modulator to alleviate fractional spurious tones introduced by the cyclic train of division ratios from delta-sigma modulators. The MASH modulator includes at least two cascaded dither-less delta-sigma modulators where each modulator includes a first feedback loop the generates the modulator feedback signal, a second feedback loop that disrupts fractional spurious tones and a third feedback loop that provides approximately zero static error. The MASH modulator further includes a combining circuit delays at least one code sequence from at least one of the delta-sigma modulators and that combines the code sequence generated by each of the delta-sigma modulators and at least one delayed code sequence.Type: GrantFiled: August 17, 2016Date of Patent: May 16, 2017Assignee: Skyworks Solutions, Inc.Inventors: Tom Taoufik Bourdi, Thomas Obkircher, Bipul Agarwal, Chandra Mohan
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Publication number: 20170126208Abstract: Digitally controlled attenuators with low phase shift are provided herein. In certain configurations, a digitally controlled attenuator includes an attenuation circuit electrically connected between an input terminal and an output terminal, a bypass circuit electrically connected in parallel with the attenuation circuit between the input terminal and the output terminal, and a plurality of phase compensation capacitors including a first phase compensation capacitor and a second phase compensation capacitor electrically connected in series between the input terminal and the output terminal. The bypass circuit is configured to receive a mode control signal for selecting the bypass circuit to control an amount of attenuation between the input terminal and the output terminal. Additionally, the phase compensation capacitors are operable to compensate for a phase difference between a first signal path through the attenuation circuit and a second signal path through the bypass circuit.Type: ApplicationFiled: January 18, 2017Publication date: May 4, 2017Inventors: Joshua Haeseok Cho, Yunyoung Choi, Bipul Agarwal
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Patent number: 9628121Abstract: A programmable-current transmit continuous-time filter (TX-CTF) system can be included in a radio frequency (RF) transmitter. The input of the TX-CTF can receive a baseband transmission signal, and the output of the TX-CTF can be provided to an upconversion mixer for conversion to RF for transmission. The TX-CTF includes amplifier circuitry and passive circuitry that together define the filter parameters. The TX-CTF further includes programmable current circuitry that provides a programmable bias current to the amplifier circuitry. The TX-CTF system also includes control logic that receives one or more transmitter control signals and, in response, generates signals that control the bias current provided to the TX-CTF.Type: GrantFiled: June 29, 2016Date of Patent: April 18, 2017Assignee: Skyworks Solutions, Inc.Inventors: Sandeep Louis D'Souza, Bipul Agarwal