Abstract: Various embodiments of a micro-disc modulator as well as a silicon photonic device and an optoelectronic communication apparatus using the micro-disc modulator are described. In one aspect, a device includes a SOI substrate and a silicon photonic structure formed on a primary surface of the SOI substrate. The semiconductor substrate includes a silicon waveguide and a micro-disc modulator. The micro-disc modulator is adjacent to the silicon waveguide and has a top surface substantially parallel to the primary surface of the SOI substrate. The top surface of the micro-disc modulator includes one or more discontinuities therein. The micro-disc modulator may be a multi junction micro-disc modulator having two vertical p-n junctions with a single resonance frequency to achieve high-speed modulation and low-power consumption.

Abstract: The subject matter disclosed herein relates to formation of silicon germanium devices with tensile strain. Tensile strain applied to a silicon germanium device in fabrication may improve performance of a silicon germanium laser or light detector.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: A photonics-optimized multi-processor system may include a plurality of processor chips, each of the processor chips comprising at least one input/output (I/O) component. The multi-processor system may also include first and second photonic components. The at least one I/O component of at least one of the processor chips may be configured to directly drive the first photonic component and receive a signal from the second photonic component. A total latency from any one of the processor chips to data at any global memory location may not be dominated by a round trip speed-of-light propagation delay. A number of the processor chips may be at least 10,000, and the processor chips may be packaged into a total volume of no more than 8 m3. A density of the processor chips may be greater than 1,000 chips per cubic meter.

Abstract: Various embodiments of a micro-disc modulator as well as a silicon photonic device and an optoelectronic communication apparatus using the micro-disc modulator are described. In one aspect, a device includes a SOI substrate and a silicon photonic structure formed on a primary surface of the SOI substrate. The semiconductor substrate includes a silicon waveguide and a micro-disc modulator. The micro-disc modulator is adjacent to the silicon waveguide and has a top surface substantially parallel to the primary surface of the SOI substrate. The top surface of the micro-disc modulator includes one or more discontinuities therein. The micro-disc modulator may be a multi junction micro-disc modulator having two vertical p-n junctions with a single resonance frequency to achieve high-speed modulation and low-power consumption.

Abstract: The subject matter disclosed herein relates to a photonic module comprising: a silicon-on-insulator (SOI) wafer; one or more photonic components on the SOI wafer; a plurality of metal pads to receive integrated circuit (IC) chips to be mounted on the SOI wafer; silicon optical waveguides to transfer optical signals among terminals of individual the IC chips, wherein the silicon optical waveguides comprise portions of the SOI wafer; and silica optical waveguides to transfer optical signals among terminals of different the IC chips.

Abstract: The subject matter disclosed herein relates to a photonic module comprising: a plurality of metal pads to receive CMOS integrated circuit (IC) chips to be mounted on a silicon-on-insulator (SOI) wafer; electrical interface circuits to receive electrical signals from the CMOS IC chips and to modify the electrical signals; optical drivers to receive the modified electrical signals and to convert the modified electrical signals to optical signals; and a photonic layer on the SOI wafer comprising silicon optical waveguides and silica optical waveguides to transmit or receive the optical signals for communication among the CMOS IC chips.

Abstract: The subject matter disclosed herein relates to formation of silicon germanium devices with tensile strain. Tensile strain applied to a silicon germanium device in fabrication may improve performance of a silicon germanium laser or light detector.

Abstract: A nanophotolithography mask includes a layer of an electrically conductive optically opaque material deposited on a mask substrate in which regular arrays of sub-wavelength apertures are formed. The plasmonic excitation in the layer perforated with the sub-wavelength apertures arrays under the light incident on the mask produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer when propagated to the same. The fill-factor of the mask, i.e., the ratio of the total apertures area to the total mask area, may lead to a significant increase in mask manufacturing throughput by FIB or electron beam “writing”. The mask demonstrates the defect resiliency and ability to imprint coherent clear features of nano dimensions and shapes on the wafers for integrated circuits design.

Abstract: A stepper system for ultra-high resolution nano-lithography employs a photolithographic mask which includes a layer of an electrically conductive optically opaque material in which periodic arrays of sub-wavelength apertures are formed. The plasmonic excitation in the photolithographic mask exposed to the light of the wavelength in the range of 197 nm-248 nm, produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer. The stepper system demonstrates the resiliency to the mask defects and ability to imprint coherent clear features of nano dimensions (45 nm-500 nm) and various shapes on the wafers for integrated circuits design. The stepper system may be adjusted to image the plane of the highest plasmonic field exiting the mask.

Abstract: A stepper system for ultra-high resolution nano-lithography employs a photolithographic mask which includes a layer of an electrically conductive optically opaque material in which periodic arrays of sub-wavelength apertures are formed. The plasmonic excitation in the photolithographic mask exposed to the light of the wavelength in the range of 197 nm-248 nm, produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer. The stepper system demonstrates the resiliency to the mask defects and ability to imprint coherent clear features of nano dimensions (45 nm-500 nm) and various shapes on the wafers for integrated circuits design. The stepper system may be adjusted to image the plane of the highest plasmonic field exiting the mask.

Abstract: A nanophotolithography mask includes a layer of an electrically conductive optically opaque material deposited on a mask substrate in which regular arrays of sub-wavelength apertures are formed. The plasmonic excitation in the layer perforated with the sub-wavelength apertures arrays under the light incident on the mask produces high resolution far-field radiation patterns of sufficient intensity to expose a photoresist on a wafer when propagated to the same. The fill-factor of the mask, i.e., the ratio of the total apertures area to the total mask area, may lead to a significant increase in mask manufacturing throughput by FIB or electron beam “writing”. The mask demonstrates the defect resiliency and ability to imprint coherent clear features of nano dimensions and shapes on the wafers for integrated circuits design.

Abstract: An optical interconnect architecture provides three dimensional optical interconnects, with the optical interconnects provided along a plane such as a wafer or a substrate. One or more integrated circuits is provided on a second “electronic” plane that is spaced from the optical interconnect plane. Signals from the circuit on the electronic plane are coupled to the optical interconnect plane using various strategies, including metal or optical interlayer interconnects extending perpendicular to the optical plane. Once on the optical interconnect plane, the signals from the circuits on the electronic plane are propagated optically.

Abstract: An optical component is formed on a silicon on insulator (SOI) substrate and has an array waveguide that demultiplexes an input light signal into N channels and provides that light signal to a corresponding set of N waveguide structures formed on a surface of the SOI substrate. The N waveguide structures provide the N channels of light to N optical detectors. Each optical detector is bonded to a surface of a corresponding one of the waveguide structures. The N channels of light pass through the N waveguide structures and are coupled into the N optical detectors so that light from a corresponding channel of the array waveguide is coupled into a corresponding optical detector and converted into an electrical signal.

Abstract: An optical component is formed on a silicon on insulator (SOI) substrate and has an array waveguide that demultiplexes an input light signal into N channels and provides that light signal to a corresponding set of N waveguide structures formed on a surface of the SOI substrate. The N waveguide structures provide the N channels of light to N optical detectors. Each optical detector is bonded to a surface of a corresponding one of the waveguide structures. The N channels of light pass through the N waveguide structures and are coupled into the N optical detectors so that light from a corresponding channel of the array waveguide is coupled into a corresponding optical detector and converted into an electrical signal.

Abstract: An optical fiber communications system using spread spectrum code division multiple access techniques to achieve better bandwidth utilization. A transmitting user in the system encodes the optical signal using a first coding mask, and a receiving user decodes the received signal using two decoding masks, all of the masks having lengths N. The first mask is divided into two sections of lengths N/2 each, one of the sections defining a first sub-code of length N/2, while the other section blocks light. Each of the second and third masks is also divided into two sections, which correspond to the two sections of the first mask. The section of the second mask corresponding to the coded section of the first mask has a second code that is identical to the first code, and the section of the second mask corresponding to the blocked section of the first mask is also blocked.