Patents by Inventor Birgit Von Ehrenwall

Birgit Von Ehrenwall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9257448
    Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: February 9, 2016
    Assignee: Infineon Technologies AG
    Inventors: Matthias Stecher, Hans Weber, Lincoln O'Riain, Birgit von Ehrenwall
  • Publication number: 20140287560
    Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.
    Type: Application
    Filed: June 9, 2014
    Publication date: September 25, 2014
    Inventors: Matthias Stecher, Hans Weber, Lincoln O'Riain, Birgit von Ehrenwall
  • Patent number: 8749018
    Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 10, 2014
    Assignee: Infineon Technologies AG
    Inventors: Matthias Stecher, Hans Weber, Lincoln O'Riain, Birgit von Ehrenwall
  • Publication number: 20110309441
    Abstract: An integrated semiconductor device is provided. The integrated semiconductor device has a first semiconductor region of a second conductivity type, a second semiconductor region of a first conductivity type forming a pn-junction with the first semiconductor region, a non-monocrystalline semiconductor layer of the first conductivity type arranged on the second semiconductor region, a first well and at least one second well of the first conductivity type arranged on the non-monocrystalline semiconductor layer and an insulating structure insulating the first well from the at least one second well and the non-monocrystalline semiconductor layer. Further, a method for forming a semiconductor device is provided.
    Type: Application
    Filed: June 21, 2010
    Publication date: December 22, 2011
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Matthias Stecher, Hans Weber, Lincoln O'Riain, Birgit von Ehrenwall
  • Publication number: 20030166323
    Abstract: In a process of fabricating on a substrate a CMOS semiconductor device having a gate electrode, a raised source, and a raised drain, the improvement comprising further incorporating a raised extension, comprising:
    Type: Application
    Filed: March 1, 2002
    Publication date: September 4, 2003
    Applicant: Infineon Technologies North America Corp.
    Inventors: Dirk Vietzke, Thomas Schafbauer, James Brighten, Birgit Von Ehrenwall