Patents by Inventor Bishnu P. Gogoi

Bishnu P. Gogoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8133783
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor material simultaneously. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: March 13, 2012
    Assignee: HVVi Semiconductors, Inc.
    Inventor: Bishnu P. Gogoi
  • Patent number: 8125044
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor material simultaneously. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 21, 2008
    Date of Patent: February 28, 2012
    Assignee: HVVi Semiconductors, Inc.
    Inventor: Bishnu P. Gogoi
  • Publication number: 20090261396
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor material simultaneously. Other embodiments are described and claimed.
    Type: Application
    Filed: October 21, 2008
    Publication date: October 22, 2009
    Inventor: Bishnu P. Gogoi
  • Publication number: 20090261446
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes forming a portion of the unidirectional transistor and a portion of a bidirectional transistor in or over a semiconductor material simultaneously. Other embodiments are described and claimed.
    Type: Application
    Filed: October 21, 2008
    Publication date: October 22, 2009
    Inventor: Bishnu P. Gogoi
  • Patent number: 7585744
    Abstract: In one embodiment, a reflowable layer 51 is deposited over a semiconductor device 10 and reflowed in an environment having a pressure approximately equal to that of atmosphere to form a seal layer 52. The seal layer 52 seals all openings 43 in the underlying layer of the semiconductor device 10. Since the reflow is performed at approximately atmospheric pressure a gap 50 which was coupled to the opening 43 is sealed at approximately atmospheric pressure, which is desirable for the semiconductor device 10 to avoid oscillation. The seal layer 52 is also desirable because it prevents particles from entering the gap 50. In another embodiment, the seal layer 52 is deposited in an environment having a pressure approximately equal to atmospheric pressure to seal the hole 43 without a reflow being performed.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: September 8, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bishnu P. Gogoi, Raymond M. Roop, Hemant D. Desai
  • Publication number: 20090146249
    Abstract: In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method to form a semiconductor structure includes removing a portion of a semiconductor material to form one or more suspended structures and a cavity, the cavity having a boundary that is below a surface of the semiconductor material and wherein the one or more suspended structures extend from the surface into the cavity. The method further includes altering the one or more suspended structures to form one or more altered suspended structures and forming a material over the one or more altered suspended structures and in a region between the one or more altered suspended structures. Other embodiments are described and claimed.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 11, 2009
    Inventors: Bishnu P. Gogoi, Michael A. Tischler, David William Wolfert, JR.
  • Patent number: 7479785
    Abstract: A circuit includes a micro electro mechanical switch and a detection circuit. The micro electro mechanical switch has a movable portion positioned to form an electrical connection between a first electrical contact and a second electrical contact in response to an electrostatic force provided by a top activation electrode and a bottom activation electrode. The detection circuit is electrically coupled to the top and bottom activation electrodes and is for detecting a first capacitance value between the top and bottom activation electrodes when the movable portion is in a first position and for detecting a second capacitance value when the movable portion is in a second position. By detecting a change in the capacitance, it can be determined if the switch is open or closed.
    Type: Grant
    Filed: August 17, 2006
    Date of Patent: January 20, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Lianjun Liu, Bishnu P. Gogoi
  • Publication number: 20080290480
    Abstract: A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls (44, 46) in a semiconductor substrate (20) having first and second opposing surfaces (22, 24). An inductor (56) is formed on the first surface (22) of the semiconductor substrate (20) and a hole (60) is formed through the second surface (24) of the substrate (20) to expose the substrate (20) between the first and second lateral etch stop walls (44, 46). The substrate (20) is isotropically etched between the first and second lateral etch stop walls (44, 46) through the etch hole (60) to create a cavity 62) within the semiconductor substrate (20). A sealing layer (70) is formed over the etch hole (60) to seal the cavity (62).
    Type: Application
    Filed: August 5, 2008
    Publication date: November 27, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventor: Bishnu P. Gogoi
  • Patent number: 7425485
    Abstract: A microelectronic assembly and a method for forming the same are provided. The method includes forming first and second lateral etch stop walls in a semiconductor substrate having first and second opposing surfaces. An inductor is formed on the first surface of the semiconductor substrate and a hole is formed through the second surface of the substrate to expose the substrate between the first and second lateral etch stop walls. The substrate is isotropically etched between the first and second lateral etch stop walls through the etch hole to create a cavity within the semiconductor substrate. A sealing layer is formed over the etch hole to seal the cavity.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 16, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Bishnu P. Gogoi
  • Patent number: 7405099
    Abstract: Methods have been provided for forming both wide and narrow trenches on a high-aspect ratio microelectromechanical (MEM) device on a substrate including a substrate layer (126), an active layer (128), and a first sacrificial layer (130) disposed at least partially therebetween. The method includes the steps of forming a first trench (154), a second trench (156), and a third trench (152) in the active layer (128), each trench (154, 156, 152) having an opening and sidewalls defining substantially equal first trench widths, depositing oxide and sacrificial layers thereover and removing the oxide and sacrificial layers to expose the third trench (152) and form a fourth trench (190) in the active layer (128) from the first and the second trench (154, 156), the fourth trench (190) having sidewalls defining a second trench width that is greater than the first trench width.
    Type: Grant
    Filed: July 27, 2005
    Date of Patent: July 29, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Bishnu P. Gogoi
  • Publication number: 20080043523
    Abstract: A circuit includes a micro electro mechanical switch and a detection circuit. The micro electro mechanical switch has a movable portion positioned to form an electrical connection between a first electrical contact and a second electrical contact in response to an electrostatic force provided by a top activation electrode and a bottom activation electrode. The detection circuit is electrically coupled to the top and bottom activation electrodes and is for detecting a first capacitance value between the top and bottom activation electrodes when the movable portion is in a first position and for detecting a second capacitance value when the movable portion is in a second position. By detecting a change in the capacitance, it can be determined if the switch is open or closed.
    Type: Application
    Filed: August 17, 2006
    Publication date: February 21, 2008
    Inventors: Lianjun Liu, Bishnu P. Gogoi
  • Patent number: 7264986
    Abstract: According to one aspect of the present invention, a method is provided for forming a microelectronic assembly. The method comprises forming first and second trenches on a semiconductor substrate, filling the first and second trenches with an etch stop material, forming an inductor on the semiconductor substrate, forming an etch hole in at least one of the etch stop layer and the semiconductor substrate to expose the substrate between the first and second trenches, isotropically etching the substrate between the first and second trenches through the etch hole to create a cavity within the substrate, and forming a sealing layer over the etch hole to seal the cavity.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 4, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Bishnu P. Gogoi
  • Patent number: 7232701
    Abstract: A microelectromechanical (MEM) device includes a substrate, a structure, a travel stop, and a protective cap. The substrate has a surface, and the structure is coupled to, and movably suspended above, the substrate surface. The structure has at least an outer surface, and the travel stop coupled to the structure outer surface and movable therewith. The travel stop includes at least an inner peripheral surface that defines a cavity. The protective cap is coupled to the substrate and includes a stop section that is disposed at least partially within the travel stop cavity and is spaced apart from the travel stop inner peripheral surface. The travel stop and the protective cap stop section together limit movement of the structure in at least three orthogonal axes.
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: June 19, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Bishnu P. Gogoi, Bernard Diem
  • Patent number: 7159459
    Abstract: Methods and apparatus are provided forming a plurality of semiconductor devices on a single substrate, and sealing two or more of the devices at different pressures. First and second semiconductor devices, each having a cavity formed therein, are formed on the same substrate. The cavity in the first device is sealed at a first pressure, and the cavity in the second device is sealed at a second pressure.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: January 9, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Bishnu P. Gogoi
  • Patent number: 7000473
    Abstract: A micro-electromechanical (MEM) device has a folded tether spring in which each fold of the spring is surrounded by a rigidly fixed inner structure and outer structure. The fixed inner structure increases restoring force of the spring. The rigidly fixed inner and outer structures each have a major surface that include a plurality of notches of fixed width relative to a distance between the major surface and the spring. Additionally in one form extensions from the major surface of the rigidly fixed inner and outer structures are provided at distal ends thereof to make initial contact with the spring. The notches of the MEM device both reduce surface area contact with the spring and wick moisture away from the spring to minimize stiction.
    Type: Grant
    Filed: April 20, 2004
    Date of Patent: February 21, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jan E. Vandemeer, Bishnu P. Gogoi, Jonathan H. Hammond
  • Patent number: 6744264
    Abstract: A MEMS sensor packaged with an integrated circuit includes switches and control circuitry. In a test mode, the control circuitry causes the switches to turn off and on such that the first and second capacitance of the MEMS sensor can be monitored individually. During a normal mode of operation, the switches are maintained such that the MEMS sensor packaged with the integrated circuit operates to produce a filtered and trimmed output reflecting the sensed phenomena.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: June 1, 2004
    Assignee: Motorola, Inc.
    Inventors: Bishnu P. Gogoi, Sung Jin Jo
  • Publication number: 20030201777
    Abstract: A MEMS sensor packaged with an integrated circuit includes switches and control circuitry. In a test mode, the control circuitry causes the switches to turn off and on such that the first and second capacitance of the MEMS sensor can be monitored individually. During a normal mode of operation, the switches are maintained such that the MEMS sensor packaged with the integrated circuit operates to produce a filtered and trimmed output reflecting the sensed phenomena.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Inventors: Bishnu P. Gogoi, Sung Jin Jo
  • Patent number: 6472243
    Abstract: A capacitive pressure sensor (10) utilizes a diaphragm (38) that is formed along with forming gates (56,57) of active devices on the same semiconductor substrate (11).
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: October 29, 2002
    Assignee: Motorola, Inc.
    Inventors: Bishnu P. Gogoi, David J. Monk, David W. Odle, Kevin D. Neumann, Donald L. Hughes, Jr., John E. Schmiesing, Andrew C. McNeil, Richard J. August
  • Patent number: 6465320
    Abstract: A method of manufacturing an electronic component includes forming first, second, and third capacitors (260, 270, 280) and electrically testing the first, second, and third capacitors to characterize an etch process for a sacrificial layer. Each of the first, second, and third capacitors has different amounts of first and second electrically insulative materials.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: October 15, 2002
    Assignee: Motorola, Inc.
    Inventors: Andrew C. McNeil, Daniel Koury, Jr., Bishnu P. Gogoi
  • Patent number: 6426239
    Abstract: A semiconductor component comprises a substrate (101), a two flexible pressure sensor diaphragms (106, 303) supported by the substrate (101), and a fixed electrode (203) between the two diaphragms (106, 303). The two diaphragms (106, 303) and the fixed electrode (203) are electrodes of two differential capacitors. The substrate (101) has a hole (601) extending from one surface (107) of the substrate (101) to an opposite surface (108) of the substrate (101). The hole (601) is located underneath the two diaphragms (106, 303), and the hole (601) at the opposite surfaces (107, 108) of the substrate (101) is preferably larger than the hole (601) at an interior portion of the substrate (101).
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: July 30, 2002
    Assignee: Motorola, Inc.
    Inventors: Bishnu P. Gogoi, David J. Monk