Patents by Inventor Bjorn E. Bjerede

Bjorn E. Bjerede has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5722040
    Abstract: Methods and apparatus for digital cordless telephone systems are preferably implemented in an integrated circuit chip set having one or more chips, adapted to receive a voice signal, for converting the voice signal into a digital signal of a desired form, for converting the digital signal into an analog signal and for modifying the frequency of the analog signal, for up converting during transmission the frequency of the analog signal from an intermediate frequency to a desired radio frequency and for down converting during reception from a selected radio frequency to the intermediate frequency and for amplifying the radio frequency signal during transmission and for switching the antenna between the transmit and receive paths. It is preferred for the chip set to include a base chip, an intermediate frequency chip, a radio frequency chip and an amplifier chip.
    Type: Grant
    Filed: February 4, 1993
    Date of Patent: February 24, 1998
    Assignee: Pacific Communication Sciences, Inc.
    Inventors: Bjorn E. Bjerede, Joseph T. Lipowski, James E. Petranovich, F. Matthew Rhodes
  • Patent number: 5648985
    Abstract: An integrated circuit chip set is provided for use in a radio communication system in which a modulated digital input signal is processed for transmission and a modulated signal received from an antenna is processed to provide an output signal, wherein the modulation of the signals is either QPSK or FSK and the signal transmission and reception is by either TDD or FDD.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: July 15, 1997
    Assignee: Rockwell Semiconductor Systems, Inc.
    Inventors: Bjorn E. Bjerede, Joseph T. Lipowski, Benny Madsen, Sheldon L. Gilbert, James E. Petranovich
  • Patent number: 5526527
    Abstract: Methods and apparatus for frequency synthesization are shown for generating an output signal of desired frequency. The frequency synthesizer includes an oscillator for generating an output signal at the desired frequency in response to a control signal. A first detector compares the output signal to a reference signal and generates a first difference signal representative of the differences, preferably in phase and frequency, between the output and the reference signals. A second detector compares the output signal to the reference signal and generates a second difference signal. A controller generates the control signal in response to either the first or second difference signal. A selector member selects between the first and second detectors to provide either the first or second control signal to the controller in response to a selection signal.
    Type: Grant
    Filed: October 1, 1993
    Date of Patent: June 11, 1996
    Assignee: Pacific Communication Sciences, Inc.
    Inventors: Joseph T. Lipowski, Bjorn E. Bjerede, John F. O'Connor
  • Patent number: 5073869
    Abstract: A direct digital frequency synthesizer generates an analog waveform of a predetermined frequency from accumulated digital frequency words which, as accumulated, represent the phase of a sine wave of the predetermined frequency. The synthesizer includes a phase accumulator, a 4-bit non-linear digital-to-analog converter (DAC) and a sample and hold circuit. The phase accumulator includes a 4-bit coarse-component accumulator for accumulating coarse phase components of the digital frequency words and a fine-component accumulator for accumulating fine phase components of the digital frequency words. The phase accumulator increments the coarse-component accumulator in response to the accumulated fine phase components exceeding a predetermined value. The 4-bit non-linear DAC converts the four bits accumulated in the coarse-component accumulator into an analog waveform of the predetermined frequency.
    Type: Grant
    Filed: August 25, 1989
    Date of Patent: December 17, 1991
    Assignee: Titan Linkabit Corporation
    Inventor: Bjorn E. Bjerede
  • Patent number: 3946323
    Abstract: A digital phase locked loop circuit for use in synchronizing output timing pulses with the positive going zero-crossings of an input data signal by quantitizing the input analog data signal as digital information, storing the digital information at given times by timing pulses, pre-programming a counter with a count corresponding to the quantitized digital information stored, and advancing or lagging an updated timing pulse in accordance with the timed count of the program counter which count is synchronized with the zero-crossings of the input data signal, whereby the updated timing pulses move to synchronism with the zero-crossings of the input data signal.
    Type: Grant
    Filed: July 25, 1974
    Date of Patent: March 23, 1976
    Assignee: General Dynamics Corporation
    Inventor: Bjorn E. Bjerede