Patents by Inventor Bladimiro Ruiz

Bladimiro Ruiz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of providing regions of low substrate capacitance
    Patent number: 7276425
    Abstract: A semiconductor device (2) includes a semiconductor substrate (12) having a surface (13) formed with a first recessed region (20). A first dielectric material (60) is deposited in the first recessed region and formed with a second recessed region (76), and a second dielectric material (100) is grown over the first dielectric material to seal the second recessed region.
    Type: Grant
    Filed: November 25, 2005
    Date of Patent: October 2, 2007
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Guy E. Averett, Keith G. Kamekona, Sudhama C. Shastri, Weizhong Cai, Gordon L. Bratten, Bladimiro Ruiz, Jr.
  • Semiconductor device and method of providing regions of low substrate capacitance
    Publication number: 20060081958
    Abstract: A semiconductor device (2) includes a semiconductor substrate (12) having a surface (13) formed with a first recessed region (20). A first dielectric material (60) is deposited in the first recessed region and formed with a second recessed region (76), and a second dielectric material (100) is grown over the first dielectric material to seal the second recessed region.
    Type: Application
    Filed: November 25, 2005
    Publication date: April 20, 2006
    Inventors: Guy Averett, Keith Kamekona, Chandrasekhara Sudhama, Weizhong Cai, Gordon Bratten, Bladimiro Ruiz
  • Semiconductor device and method of providing regions of low substrate capacitance
    Publication number: 20030146490
    Abstract: A semiconductor device (2) includes a semiconductor substrate (12) having a surface (13) formed with a first recessed region (20). A first dielectric material (60) is deposited in the first recessed region and formed with a second recessed region (76), and a second dielectric material (100) is grown over the first dielectric material to seal the second recessed region.
    Type: Application
    Filed: February 7, 2002
    Publication date: August 7, 2003
    Applicant: Semiconductor Components Industries, LLC.
    Inventors: Guy E. Averett, Keith G. Kamekona, Chandrasekhara Sudhama, Weizhong Cai, Gordon L. Bratten, Bladimiro Ruiz