Patents by Inventor Blake Fitch

Blake Fitch has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10740274
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: August 11, 2020
    Assignee: International Business Machines Corporation
    Inventors: Thomas Ward, Blake Fitch
  • Publication number: 20190197004
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Application
    Filed: March 4, 2019
    Publication date: June 27, 2019
    Inventors: Thomas Ward, Blake Fitch
  • Patent number: 10331608
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Grant
    Filed: September 22, 2017
    Date of Patent: June 25, 2019
    Assignee: International Business Machines Corporation
    Inventors: Thomas Ward, Blake Fitch
  • Patent number: 10324887
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: June 18, 2019
    Assignee: International Business Machines Corporation
    Inventors: Thomas Ward, Blake Fitch
  • Publication number: 20190095376
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 28, 2019
    Inventors: Thomas Ward, Blake Fitch
  • Publication number: 20190095375
    Abstract: A supercomputer comprising a memory device and a plurality of interconnected hardware processors capable of performing parallel processing is coupled to a mainframe computer comprising one or more hardware processors. The supercomputer functions as a part of the mainframe computer's memory hierarchy.
    Type: Application
    Filed: September 22, 2017
    Publication date: March 28, 2019
    Inventors: Thomas Ward, Blake Fitch
  • Publication number: 20070150870
    Abstract: A computer-implemented method for collecting trace streams in application code, instruments the application code to detect an application context. The application context includes static and dynamic attributes.
    Type: Application
    Filed: December 22, 2005
    Publication date: June 28, 2007
    Inventors: Blake Fitch, Robert Germain, Thomas Ward, Aleksandr Rayshubskiy
  • Publication number: 20060241928
    Abstract: A method for creating a load balanced spatial partitioning of a structured, diffusing system of particles with pairwise interactions, comprises steps of: assigning a weight corresponding to a computational cost for a pair interaction of particles to a simulation space distance between the particles; performing a spatial partitioning of the simulation space; and assigning computation of pair interaction to any node that has the positions of both particles. The method can also be implemented as machine executable instructions executed by a programmable information processing system or as hard coded logic in a specialized computing apparatus such as an application-specific integrated circuit (ASIC).
    Type: Application
    Filed: April 25, 2005
    Publication date: October 26, 2006
    Inventors: Blake Fitch, Robert Germain, Michael Pitman, Aleksandr Rayshubskiy
  • Publication number: 20060010181
    Abstract: A method, information processing system and computer readable medium for performing a transpose of a multidimensional matrix in a distributed memory network. The method includes storing a multidimensional matrix of side N in a distributed memory network comprising a plurality of nodes and distributing work associated with a calculation of a transpose of the matrix among N2 of the plurality of nodes. The method further includes receiving results of the calculation of the transpose of the matrix by the nodes.
    Type: Application
    Filed: July 8, 2004
    Publication date: January 12, 2006
    Inventors: Maria Eleftheriou, Blake Fitch, Robert Germain, Aleksandr Rayshubskiy, T. Ward