Patents by Inventor Bo Chang

Bo Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147315
    Abstract: A method of a terminal may comprise: receiving, from a CU of a base station, configuration information of one or more candidate cells and configuration information for measurement; performing L1 measurement on the candidate cells based on the configuration information for measurement; acquiring uplink synchronization for the candidate cells by performing an uplink synchronization management procedure for the candidate cells based on the configuration information of the candidate cells; reporting a result of the L1 measurement to a DU of the base station; receiving, from the DU of the base station, information on a target cell, being the target cell to switch among the candidate cells, based on the result of the L1 measurement; and applying the uplink synchronization acquired through the uplink synchronization management procedure to the target cell.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 2, 2024
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyun Seo PARK, Yong Jin KWON, Yun Joo KIM, Han Jun PARK, Jung Bo SON, An Seok LEE, Yu Ro LEE, Sun Cheol CHANG, Heesoo LEE
  • Publication number: 20240145691
    Abstract: The present invention is related to a novel positive electrode active material for lithium-ion battery. The positive electrode active material is expressed by the following formula: Li1.2NixMn0.8-x-yZnyO2, wherein x and y satisfy 0<x?0.8 and 0<y?0.1. In addition, the present invention provides a method of manufacturing the positive electrode active material. The present invention further provides a lithium-ion battery which uses said positive electrode active material.
    Type: Application
    Filed: March 14, 2023
    Publication date: May 2, 2024
    Inventors: CHUAN-PU LIU, YIN-WEI CHENG, SHIH-AN WANG, BO-LIANG PENG, CHUN-HUNG CHEN, JUN-HAN HUANG, YI-CHANG LI
  • Patent number: 11972113
    Abstract: A method for performing link management of a memory device in predetermined communications architecture with aid of handshaking phase transition control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit to turn on a physical layer (PHY) circuit of the transmission interface circuit, for starting establishing a link between a host device and the memory device; before entering a first handshaking phase, utilizing the PHY circuit to receive any first incoming data sent from the host device to determine whether the any first incoming data indicates that the host device is in a corresponding first handshaking phase; and in response to the any first incoming data indicating that the host device is in the corresponding first handshaking phase, utilizing the PHY circuit to send first outgoing data that is equal to first predetermined data to the host device.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: April 30, 2024
    Assignee: Silicon Motion, Inc.
    Inventors: Bo-Chang Ye, Kuo-Cyuan Kuo, Chih-Chiang Chen
  • Patent number: 11967966
    Abstract: The present disclosure provides a circuit and method for expanding the lock range of injection-locked oscillators. The circuit includes N injection-locked oscillators and a lock detector, where the lock detector includes an alignment monitor, a clock selector, and N self-samplers. A pulse reference signal is inputted into the N injection-locked oscillators, and the output of each injection-locked oscillator is connected to the clock selector and the corresponding self-sampler. The self-samplers sample the outputs of the N injection-locked oscillators and output the sampling results to the alignment monitor. The alignment monitor monitors the sampling results, determines the locking conditions of the injection-locked oscillators, and turns off the unlocked oscillators. The clock selector selects a locked oscillator and transmits the output of the locked oscillator as a system lock.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: April 23, 2024
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: Ziyi Chang, Bo Zhao
  • Publication number: 20240107441
    Abstract: A method of a terminal may comprise: receiving a first message including state information of a base station from the base station; identifying preliminary inactive state information included in the first message when the state information of the base station indicates a preliminary inactive state; and performing a cell selection based on the preliminary inactive state information.
    Type: Application
    Filed: September 26, 2023
    Publication date: March 28, 2024
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun Seo PARK, Yong Jin KWON, Yun Joo KIM, Han Jun PARK, Jung Bo SON, An Seok LEE, Yu Ro LEE, Heesoo LEE, Sung Cheol CHANG
  • Publication number: 20240105351
    Abstract: A method for measuring drop time of a control rod cluster integrated with a rod position measurement device is provided, wherein the method is used to measure the drop time of each control rod cluster, and includes: Si, monitoring a voltage Ua of coils in Group A to capture a rod cluster drop signal; S2, searching a point (tmax, Vmax) with a maximum drop speed or with a local maximum drop speed; S3, retroactively calculating, from tmax, an end of a time period T4 when the control rod cluster starts to drop; S4, retroactively searching, from a minimum value point of a drop reference signal DROPref, a start of the time period T4 when the drop reference signal DROPref drops from a maximum value to 33% thereof; and S5, determining, from tmax forward, a time point t6 when a drop speed of the control rod cluster is lower than 0.
    Type: Application
    Filed: January 14, 2021
    Publication date: March 28, 2024
    Applicant: NUCLEAR POWER OPERATIONS RESEARCH INSTITUTE (NPRI)
    Inventors: Zhengke CHANG, Minghui ZHANG, Yuan HUANG, Ye TIAN, Shaohua XU, Xinxin LIU, Weijian ZHU, Yiming MA, Shengfeng XU, Bo CHAO, Ning TAO, Zihua YANG, Desong LANG, Qichao WANG
  • Publication number: 20240098909
    Abstract: An electronic device includes a first component and a second component. The first component includes a first housing and a protrusion element. The first housing has a first cover plate, and the protrusion element is disposed on the first cover plate. The second component is rotationally assembled with the first component along a first direction. The second component includes a second housing, an elastic structure, and a switching element. The elastic structure has an elastic post. The second housing has a second cover plate having a through hole. One part of the elastic post passes through the through hole and is exposed on the second cover plate. The protrusion element moves along a first direction relative to the elastic structure, such that the elastic post is squeezed by the protrusion element to move along a second direction and presses the switching element.
    Type: Application
    Filed: June 16, 2023
    Publication date: March 21, 2024
    Inventors: HSIN-CHANG LIN, BO-YEN CHEN
  • Publication number: 20240079485
    Abstract: A high electron mobility transistor device including a channel layer, a first barrier layer, and a P-type gallium nitride layer is provided. The first barrier layer is disposed on the channel layer. The P-type gallium nitride layer is disposed on the first barrier layer. The first thickness of the first barrier layer located directly under the P-type gallium nitride layer is greater than the second thickness of the first barrier layer located on two sides of the P-type gallium nitride layer.
    Type: Application
    Filed: October 27, 2022
    Publication date: March 7, 2024
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Jih-Wen Chou, Chih-Hung Lu, Bo-An Tsai, Zheng-Chang Mu, Po-Hsien Yeh, Robin Christine Hwang
  • Publication number: 20240056080
    Abstract: A level shifter includes a cross-coupled transistor pair, first through third cascode transistor pairs and a differential input pair sequentially coupled in series, and further includes a sub level shifter. The first cascode transistor pair is controlled by a first reference voltage. The second cascode transistor pair is controlled by a pair of differential control voltages. The third cascode transistor pair is controlled by a second reference voltage lower than the first reference voltage. The differential input pair is controlled by a pair of differential input voltages. The sub level shifter generates the differential control voltages according to the differential input voltages and the first and second reference voltages. The differential control voltages are switched between the first and second reference voltages. The level shifter outputs a pair of differential output voltages through inverted and non-inverted output terminals coupled with the second cascode transistor pair.
    Type: Application
    Filed: August 8, 2023
    Publication date: February 15, 2024
    Inventors: Chun-Yuan LO, Wu-Chang CHANG, Bo-Chang LI
  • Patent number: 11903325
    Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: February 13, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
  • Publication number: 20240036738
    Abstract: A method for performing link management of a memory device in predetermined communications architecture with aid of handshaking phase transition control and associated apparatus are provided. The method may include: utilizing at least one upper layer controller of a transmission interface circuit to turn on a physical layer (PHY) circuit of the transmission interface circuit, for starting establishing a link between a host device and the memory device; before entering a first handshaking phase, utilizing the PHY circuit to receive any first incoming data sent from the host device to determine whether the any first incoming data indicates that the host device is in a corresponding first handshaking phase; and in response to the any first incoming data indicating that the host device is in the corresponding first handshaking phase, utilizing the PHY circuit to send first outgoing data that is equal to first predetermined data to the host device.
    Type: Application
    Filed: July 26, 2022
    Publication date: February 1, 2024
    Applicant: Silicon Motion, Inc.
    Inventors: Bo-Chang Ye, Kuo-Cyuan Kuo, Chih-Chiang Chen
  • Patent number: 11821314
    Abstract: An underground mining method for unexploited coal in a boundary open-pit mine is provided. A shaft construction platform is arranged at one rock step to two rock steps above a coal seam. Intermediate bridges are built starting from a pit bottom. Mining area clay is laid on a working slope where no intermediate bridge is built and on a side slope with an outcrop of the coal seam as a sealing layer to seal the slopes. Auxiliary vertical shafts and main inclined shafts are dug. The pit bottom is dug downward to form a digging space on a side close to the working slope between two adjacent ones of the intermediate bridges, and clay is filled into the digging space to form an artificial water barrier layer. A roadway communicating the main inclined shafts and the auxiliary vertical shafts is constructed, and a coal seam stope face is arranged.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: November 21, 2023
    Assignees: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, XINJIANG TIANCHI ENERGY CO., LTD., CHINA ENERGY GROUP XINJIANG ENERGY COMPANY LTD
    Inventors: Shuzhao Chen, Fuming Liu, Bo Chang
  • Publication number: 20230352926
    Abstract: A surge protection apparatus includes a chassis, a surge circuit breaker, and a surge protection module. The chassis has an accommodating space and an opening, and the opening is communicated with the accommodating space. The surge circuit breaker is disposed in the accommodating space. The surge protection module is configured to be electrically connected to a second connector in the chassis, and the second connector is electrically connected to the surge circuit breaker. The surge protection module extends in a first axis, and the surge protection module is plugged in or pulled out of the chassis through the opening along the first axis. The surge protection module includes a first connector detachably connected to the second connector.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Inventors: Shan-Chun YANG, Mu-Bo CHANG, Kuan-Lung WU
  • Publication number: 20230305711
    Abstract: A data processing method includes reading a memory device in response to a read command to respectively read multiple portions of predetermined data; respectively writing the portions in a buffer memory to complete data transfers of the portions of the predetermined data; sequentially providing access information corresponding to each portion of the predetermined data in response to completion of the data transfer of the corresponding portion; obtaining the access information of the predetermined data and accordingly generating multiple descriptors in chronological order of obtaining the access information; receiving and buffering the descriptors in a descriptor pool; sequentially selecting a latest descriptor from the descriptor pool according to a tag value and providing the latest descriptor to a direct memory access engine; and reading the buffer memory according to the latest descriptor to obtain at least a portion of the predetermined data by the direct memory access engine.
    Type: Application
    Filed: March 2, 2023
    Publication date: September 28, 2023
    Applicant: Silicon Motion, Inc.
    Inventors: Bo-Chang Ye, I-Ta Chen, Wen-Shu Chen, Kuo-Cyuan Kuo
  • Publication number: 20230235667
    Abstract: An underground mining method for unexploited coal in a boundary open-pit mine is provided. A shaft construction platform is arranged at one rock step to two rock steps above a coal seam. Intermediate bridges are built starting from a pit bottom. Mining area clay is laid on a working slope where no intermediate bridge is built and on a side slope with an outcrop of the coal seam as a sealing layer to seal the slopes. Auxiliary vertical shafts and main inclined shafts are dug. The pit bottom is dug downward to form a digging space on a side close to the working slope between two adjacent ones of the intermediate bridges, and clay is filled into the digging space to form an artificial water barrier layer. A roadway communicating the main inclined shafts and the auxiliary vertical shafts is constructed, and a coal seam stope face is arranged.
    Type: Application
    Filed: January 25, 2023
    Publication date: July 27, 2023
    Applicants: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, Xinjiang Tianchi Energy Co., Ltd., China Energy Group Xinjiang Energy Company Ltd
    Inventors: Shuzhao CHEN, Fuming LIU, Bo CHANG
  • Patent number: 11615305
    Abstract: A variational hyper recurrent neural network (VHRNN) can be trained by, for each step in sequential training data: determining a prior probability distribution for a latent variable from a prior network of the VHRNN using an initial hidden state; determining a hidden state from a recurrent neural network (RNN) of the VHRNN using an observation state, the latent variable and the initial hidden state; determining an approximate posterior probability distribution for the latent variable from an encoder network of the VHRNN using the observation state and the initial hidden state; determining a generating probability distribution for the observation state from a decoder network of the VHRNN using the latent variable and the initial hidden state; and maximizing a variational lower bound of a marginal log-likelihood of the training data. The trained VHRNN can be used to generate sequential data.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: March 28, 2023
    Assignee: ROYAL BANK OF CANADA
    Inventors: Ruizhi Deng, Yanshuai Cao, Bo Chang, Marcus Brubaker
  • Publication number: 20230032954
    Abstract: A bearing device in a radial flow adsorber with a gas flow guide function includes a bearing platform, a supporting cylinder, a flow guide pipe, an annular bottom plate, a limiting block and a supporting frame, wherein an upper portion of the bearing platform is filled with adsorbent, an interior of a lower portion of the bearing platform is connected with the annular bottom plate through the supporting cylinder, a backing plate is arranged between the bearing platform and the supporting cylinder, on the supporting cylinder or the annular bottom plate is opened a hole and arranged a plurality of flow guide pipes for guiding gas flow, the annular bottom plate is placed on the supporting frame, the limiting block is arranged on the supporting frame, and the supporting frame is fixed on a cylinder body or a lower head of the adsorber by welding.
    Type: Application
    Filed: August 1, 2022
    Publication date: February 2, 2023
    Applicant: HANGZHOU OXYGEN PLANT GROUP CO., LTD.
    Inventors: Yi GAO, Yisong HAN, Xiuna LIN, Yun WU, Xudong PENG, Jiang CHEN, Bo CHANG
  • Publication number: 20220384523
    Abstract: A MRAM circuit structure is provided in the present invention, with the unit cell composed of three transistors in series and four MTJs, wherein the junction between first transistor and third transistor is first node, the junction between second transistor and third transistor is second node, and the other ends of first transistor and third transistor are connected to a common source line. First MTJ is connected to second MTJ in series to form a first MTJ pair that connecting to the first node, and third MTJ is connected to fourth MTJ in series to form a second MTJ pair that connecting to the second node.
    Type: Application
    Filed: July 7, 2021
    Publication date: December 1, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Cheng-Tung Huang, Jen-Yu Wang, Yung-Ching Hsieh, Po-Chun Yang, Jian-Jhong Chen, Bo-Chang Li
  • Publication number: 20220263012
    Abstract: A memory device includes a substrate; an active area extending along a first direction on the substrate; a gate line traversing the active area and extending along a second direction that is not parallel to the first direction; a source doped region in the active area and on a first side of the gate line; a main source line extending along the first direction; a source line extension coupled to the main source line and extending along the second direction; a drain doped region in the active area and on a second side of the gate line that is opposite to the first side; and a data storage element electrically coupled to the drain doped region. The main source line is electrically connected to the source doped region via the source line extension.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Ting Wu, Yan-Jou Chen, Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yung-Ching Hsieh, Jian-Jhong Chen, Bo-Chang Li
  • Publication number: 20220238572
    Abstract: A method includes etching a semiconductor substrate to form a trench, filling a dielectric layer into the trench, with a void being formed in the trench and between opposite portions of the dielectric layer, etching the dielectric layer to reveal the void, forming a diffusion barrier layer on the dielectric layer, and forming a high-reflectivity metal layer on the diffusion barrier layer. The high-reflectivity metal layer has a portion extending into the trench. A remaining portion of the void is enclosed by the high-reflectivity metal layer.
    Type: Application
    Filed: April 11, 2022
    Publication date: July 28, 2022
    Inventors: Ming-Chi Wu, Chun-Chieh Fang, Bo-Chang Su, Chien Nan Tu, Yu-Lung Yeh, Kun-Yu Lin, Shih-Shiung Chen