Patents by Inventor Bo-Cheol Jeong
Bo-Cheol Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10910373Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: GrantFiled: February 18, 2020Date of Patent: February 2, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-Gun You, Se-wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Patent number: 10692864Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: GrantFiled: December 27, 2018Date of Patent: June 23, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung-Gun You, Se-Wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Publication number: 20200185382Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: ApplicationFiled: February 18, 2020Publication date: June 11, 2020Inventors: JUNG-GUN YOU, Se-wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Publication number: 20190131300Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: ApplicationFiled: December 27, 2018Publication date: May 2, 2019Inventors: JUNG-GUN YOU, Se-wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Patent number: 10199377Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: GrantFiled: March 17, 2017Date of Patent: February 5, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Gun You, Se-Wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Patent number: 10074572Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalls of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalls of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.Type: GrantFiled: April 19, 2017Date of Patent: September 11, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-yup Chung, Yoon-seok Lee, Hyun-jo Kim, Hwa-sung Rhee, Hee-don Jeong, Se-wan Park, Bo-cheol Jeong
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Publication number: 20170221770Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalls of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalls of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.Type: ApplicationFiled: April 19, 2017Publication date: August 3, 2017Inventors: Jae-yup Chung, Yoon-seok LEE, Hyun-jo KIM, Hwa-sung RHEE, Hee-don JEONG, Se-wan PARK, Bo-cheol JEONG
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Publication number: 20170194324Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: ApplicationFiled: March 17, 2017Publication date: July 6, 2017Inventors: Jung-Gun You, Se-Wan PARK, Baik-Min SUNG, Bo-Cheol JEONG
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Patent number: 9673330Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalk of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalk of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.Type: GrantFiled: December 11, 2015Date of Patent: June 6, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jae-yup Chung, Yoon-seok Lee, Hyun-jo Kim, Hwa-sung Rhee, Hee-don Jeong, Se-wan Park, Bo-cheol Jeong
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Patent number: 9601628Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: GrantFiled: December 30, 2015Date of Patent: March 21, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jung-Gun You, Se-Wan Park, Baik-Min Sung, Bo-Cheol Jeong
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Publication number: 20170062420Abstract: A semiconductor device including a first fin pattern and a second fin pattern which have respective short sides facing each other and are separated from each other, a first field insulating layer which is around the first fin pattern and the second fin pattern, a second field insulating layer and a third field insulating layer which are between the first fin pattern and the second fin pattern, a first gate which is formed on the first fin pattern to intersect the first fin pattern, a second gate which is formed on the second field insulating layer, and a third gate which is formed on the third field insulating layer, wherein upper surfaces of the second and third field insulating layers protrude further upward than an upper surface of the first field insulating layer, and a distance between the first gate and the second gate is equal to a distance between the second gate and the third gate.Type: ApplicationFiled: July 28, 2016Publication date: March 2, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Jung-Gun YOU, Dae-Lim KANG, Myung-Yoon UM, Jeong-Hyo LEE, Jae-Yup CHUNG, Jun-Sun HWANG, Bo-Cheol JEONG
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Publication number: 20160247876Abstract: An integrated circuit device includes first and second fin-type active regions having different conductive type channel regions, a first device isolation layer covering both sidewalk of the first fin-type active region, and a second device isolation layer covering both sidewalls of the second fin-type active region. The first device isolation layer and the second device isolation layer have different stack structures. To manufacture the integrated circuit device, the first device isolation layer covering both sidewalls of the first fin-type active region and the second device isolation layer covering both sidewalk of the second fin-type active region are formed after the first fin-type active region and the second fin-type active region are formed. The first device isolation layer and the second device isolation layer are formed to have different stack structure.Type: ApplicationFiled: December 11, 2015Publication date: August 25, 2016Inventors: Jae-yup Chung, Yoon-seok LEE, Hyun-jo KIM, Hwa-sung RHEE, Hee-don JEONG, Se-wan PARK, Bo-cheol JEONG
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Publication number: 20160211379Abstract: Semiconductor devices are provided including a first fin-shaped pattern having first and second sidewalls facing one another and a field insulating film contacting at least a portion of the first fin-shaped pattern. The first fin-shaped pattern includes a lower portion of the first fin-shaped pattern contacting the field insulating film; an upper portion of the first fin-shaped pattern not contacting the field insulating film; a first boundary between the lower portion of the first fin-shaped pattern and the upper portion of the first fin-shaped pattern; and a first fin center line perpendicular to the first boundary and meeting the top of the upper portion of the first fin-shaped pattern. The first sidewall of the upper portion of the first fin-shaped pattern and the second sidewall of the upper portion of the first fin-shaped pattern are asymmetric with respect to the first fin center line.Type: ApplicationFiled: December 30, 2015Publication date: July 21, 2016Inventors: Jung-Gun You, Se-Wan Park, Baik-Min Sung, Bo-Cheol Jeong