Patents by Inventor Bo Hu

Bo Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250244852
    Abstract: The present disclosure provides an array substrate and a touch display device. The array substrate includes: a plurality of pixels arranged in an array, each pixel includes N sub-pixels of different colors arranged along a first direction, and N?3; a plurality of touch sensor units arranged in an array, each touch sensor unit corresponds to m*N sub-pixels in the first direction, and m is a positive integer; a plurality of touch signal lines, each touch sensor unit is connected with at least one touch signal line. Along the first direction, each touch sensor unit in a same row is connected with a same number of touch signal lines, each touch signal line is connected with a corresponding touch sensor unit through an access point, and the access points of the touch signal lines connected to a same row of touch sensor units are in a same sub-pixel color environment.
    Type: Application
    Filed: October 26, 2023
    Publication date: July 31, 2025
    Inventors: Chunyu LI, Bo HU, Lifeng LIN, Xin LIN, Rong ZHOU, Xiaofeng YIN, Jianshu WANG, Pei HU, Tongwei MO
  • Patent number: 12355635
    Abstract: An analysis device includes processing circuitry configured to generate a graph in which each IP host indicated in communication information is set as a node and communication between the each IP host is set as an edge on a basis of the communication information of a network, calculate a degree of relevance between a predetermined IP host and each IP host on the graph using the generated graph, correct the graph by adding or deleting an edge connecting each IP host on the graph on a basis of a degree of relevance between a predetermined IP host and each IP host on the graph, calculate a degree of relevance between the predetermined IP host and each IP host using the corrected graph, and output a degree of relevance between the predetermined IP host and each IP host.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: July 8, 2025
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shosuke Oba, Kazunori Kamiya, Bo Hu
  • Patent number: 12342622
    Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a first substrate, and scanning lines and data lines arranged on the first substrate. The display substrate includes a plurality of pixel structures, each pixel structure includes a plurality of sub-pixel structures, each sub-pixel structure includes a common electrode and a pixel electrode, and an orthogonal projection of the common electrode onto the first substrate overlaps with an orthogonal projection of the pixel electrode onto the first substrate. The sub-pixel structures include a target sub-pixel structure, the common electrode of the target sub-pixel structure includes a first portion, a second portion, a third portion, and a fourth portion, and the first portion and the second portion are arranged along a first direction and extend along a second direction.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: June 24, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Linlin Lin, Bo Hu, Yao Liu
  • Publication number: 20250173820
    Abstract: Aspects concern a method for processing spatial data comprising the steps of: receiving a spatial data file from a spatial data source; generating a first tileset associated with the spatial data file, the first tileset comprising a plurality of tiles and corresponding identifiers; comparing the identifier of each of the plurality of tiles in the first tileset with an identifier of each tile in a second tileset to identify at least one duplicate; and merging the tiles identified to be duplicate tiles.
    Type: Application
    Filed: April 13, 2023
    Publication date: May 29, 2025
    Inventors: Yuxiang PENG, Haonan DONG, Bo HU
  • Publication number: 20250159930
    Abstract: Provided is a metal-oxide thin-film transistor. The metal-oxide thin-film transistor includes a gate, a gate insulation layer, a metal-oxide semiconductor layer, a source electrode, a drain electrode, and a passivation layer that are successively disposed on a base substrate; wherein the source electrode and the drain electrode are both in a stacked structure including a bulk metal layer and an electrode protection layer; wherein the electrode protection layer includes a metal or a metal alloy; the electrode protection layer is at least disposed between the metal-oxide semiconductor layer and the bulk metal layer; wherein a metal-oxide layer is disposed between the electrode protection layer and the bulk metal layer.
    Type: Application
    Filed: January 15, 2025
    Publication date: May 15, 2025
    Inventors: Bin LIN, Liangliang LI, Zheng LIU, Bo HU, Rui ZHANG, Xinlin PENG
  • Publication number: 20250144526
    Abstract: An animation processing method is performed by an electronic device. The method includes: determining a target movement parameter matching a target movement instruction for controlling movement of a virtual object; driving movement of a logic entity based on the target movement parameter; predicting, while driving the movement of the logic entity based on the target movement parameter, a first predicted trajectory of a representation entity based on the target movement parameter, the representation entity being configured to represent the virtual object; selecting, from a preset animation library, a target animation adapted to the first predicted trajectory, the preset animation library including animations corresponding to various moving actions respectively; driving movement of the representation entity based on the target animation; and rendering a moving animation of the virtual object in a virtual scene based on the movement of the logic entity and the movement of the representation entity.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Inventors: Shilei CHEN, Jichun Hou, Tao Xu, Bo Hu
  • Patent number: 12293735
    Abstract: A liquid crystal display panel and a driving method of a liquid crystal display panel. The driving method includes: providing a first gate signal to a first gate line corresponding to a first row of sub-pixels among the plurality of rows of sub-pixels, in which the first gate signal includes an on period and an off period used to control the first row of sub-pixels to be turned on and off respectively; writing, during the on period of the first gate signal, a plurality of first data signals to sub-pixels among the first row of sub-pixels through the plurality of data lines, and during the on period of the first gate signal, a first writing time length of a negative polarity data signal is less than a second writing time length of a positive polarity data signal.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 6, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zuwei Weng, Yichiang Lai, Bo Hu
  • Publication number: 20250131452
    Abstract: Provided are a method for tracking carbon flow of a power system, a device and a medium. The method includes: acquiring related data of carbon flow tracking, where the related data include an injected active power sum column matrix of generator sets of all substations to be tracked, an injected carbon flow rate sum column matrix of generator sets of all substations to be tracked, an output power distribution matrix of a branch formed between substations to be tracked, and a power flow proportion distribution matrix of the branch formed between substations to be tracked; acquiring a carbon potential matrix EN of each substation to be tracked; and acquiring a carbon flow rate of each substation to be tracked, a carbon flow rate of the branch, and a carbon flow rate of an output load on the basis of the carbon potential matrix of each substation to be tracked.
    Type: Application
    Filed: October 15, 2024
    Publication date: April 24, 2025
    Inventors: Bo HU, Gangjun GONG, Jiaxuan YANG, Wanli CUI, Jichao DONG, Jun LU, Xu ZHANG, Chunhua LIN, Zongle MA, Ren QIANG, Li LIU, Qiguo ZHANG, Xin WU, Jiuliang LIU, Luyao WANG, Luning JIANG, Yurui WANG, Chang SU, Qiang FANG, Ao YU, Yutong WANG, Shengjie ZHOU, Meinan LIN, Linan FENG, Yilin LIU, Qiang ZHANG
  • Publication number: 20250133019
    Abstract: Some embodiments provide a method for configuring a network to bridge data messages between a hardware-implemented L2 overlay network segment and a software-implemented L2 overlay network segment. The method identifies a host computer on which a logical network endpoint connected to the software-implemented overlay executes. The hardware-implemented L2 overlay connects at least a first set of network endpoints located in a first physical network zone and connected to a first L2 network segment and a second set of network endpoints located in a second physical network zone and connected to a second L2 network segment. The identified host computer is located in the first physical network zone. The method configures a forwarding element executing on the host computer to bridge data messages between the logical network endpoint and (i) the first set of network endpoints and (ii) the second set of network endpoints.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Applicant: VMware, Inc.
    Inventors: Mukesh Hira, Hongwei Zhu, Bo Hu
  • Publication number: 20250132982
    Abstract: Some embodiments provide a method for configuring a network to bridge data messages between a logical overlay network layer 2 (L2) segment and a physical L2 segment. The method identifies each host computer in the network on which at least one logical network endpoint connected to the logical overlay network L2 segment executes. For each identified host computer, the method configures a forwarding element executing on the identified host computer to bridge (i) data messages sent from the logical network endpoints executing on the identified host computer to network endpoints connected to the physical L2 segment and (ii) data messages sent from network endpoints connected to the physical L2 segment, executing on the identified host computer and on other host computers in the network, to the logical network endpoints executing on the identified host computer.
    Type: Application
    Filed: October 19, 2023
    Publication date: April 24, 2025
    Inventors: Mukesh Hira, Hongwei Zhu, Bo Hu
  • Publication number: 20250122799
    Abstract: Infill-to-parent well frac hits or fracture driven interactions occur when infill well fractures intersect with parent well depleted fractures or parent wellbores themselves. As a result, both the parent and infill well production can be negatively impacted. Understanding and mitigating frac hits is crucial for unconventional assets since they can impact many aspects of field development. Frac hits can cause parent well production loss, making it an important consideration when it comes to well spacing-stacking, completion design, and drilling schedules optimization decisions. In cases where parent wells have been knocked offline by frac hits, well interventions are often necessary to restore production. Refracturing of parent wells has been proven to protect them from offset infill frac hits, and also presents a secondary field development opportunity.
    Type: Application
    Filed: April 10, 2024
    Publication date: April 17, 2025
    Inventors: Yongshe LIU, Xin Luo, Susan C. NAISER, M. Taufique MIAN, Glennis R. SYLVESTER, Marina I. RAMIREZ MEDINA, Junjing ZHANG, Dong SONG, Grant EVANS, Preston HOWARD, Duncan THOM, Bo HU
  • Publication number: 20250098305
    Abstract: An array substrate, a display panel and a manufacturing method thereof are provided. The array substrate includes data lines, gate lines, a gate driving structure electrically connected with the gate lines and the gate driving signal lines, gate driving signal lines and a data fanout wiring region. The array substrate further includes a dummy fanout wiring region, a dummy pad region and a bended line, the data fanout wiring region and the dummy fanout wiring region are located at both sides of the display region, the data lines are electrically connected with pads in the dummy pad region through the wires in the dummy fanout wiring region; the gate driving signal lines are electrically connected with pads in the dummy pad region; a transmission line is disposed at one side of the gate driving structure away from the display region and electrically connected with the bended line.
    Type: Application
    Filed: February 27, 2023
    Publication date: March 20, 2025
    Inventors: Chunyu LI, Lifeng LIN, Bo HU, Xin LIN, Xin FANG, Wenchao WANG, Rong ZHOU, Jianshu WANG, Pei HU, Yichiang LAI
  • Publication number: 20250089367
    Abstract: An array substrate includes a driving circuit arranged on the base substrate, and the driving circuit includes a pull-up node control circuit, a first pull-down node control circuit, and an output circuit; the pull-up node control circuit controls a potential of the pull-up node; the first pull-down node control circuit controls to write a first control voltage provided by the first control voltage line into the first pull-down node; the output circuit controls the driving signal output terminal to output a driving signal under the control of the potential of the pull-up node; the array substrate also includes a first conductive portion arranged on the base substrate; the first conductive portion is electrically connected to the first control voltage line.
    Type: Application
    Filed: February 28, 2023
    Publication date: March 13, 2025
    Inventors: Chunyu LI, Bo HU, Xin LIN, Rong ZHOU, Lifeng LIN, Jianshu WANG, Pei HU
  • Patent number: 12243137
    Abstract: Aspects concern a distributed computing system for generating vector tiles of a selected map area including a memory unit configured to store map data and a task database, the map data including a representation of the selected map area with a first resolution and a first detail level and with a second resolution higher than the first resolution and a second detail level; two or more processing units, each of the two or more processing units configured to select a task included in the task database, to execute the selected task, and to provide data generated by the selected task to the memory unit for storage; wherein one of the two or more processing units is further configured to schedule the generation of vector tiles by determining tasks using a specific predefined directed acyclic task graph and to provide the determined task to the task database.
    Type: Grant
    Filed: January 23, 2022
    Date of Patent: March 4, 2025
    Assignee: GRABTAXI HOLDINGS PTE. LTD.
    Inventors: Yuxiang Peng, Haonan Dong, Bo Hu
  • Patent number: 12236661
    Abstract: A method of complementing a map of a scene with 3D reference points including four steps. In a first step, data is collected and recorded based on samples of at least one of an optical sensor, a GNSS, and an IMU. A second step includes initial pose generation by processing of the collected sensor data to provide a track of vehicle poses. A pose is based on a specific data set, on at least one data set recoded before that dataset and on at least one data set recorded after that data set. A third step includes SLAM processing of the initial poses and collected optical sensor data to generate keyframes with feature points. In a fourth step 3D reference points are generated by fusion and optimization of the feature points by using future and past feature points together with a feature point at a point of processing. This second and fourth steps provides significantly better results than SLAM or VIO methods known from prior art, as the second and the fourth steps are based on recorded data.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: February 25, 2025
    Assignee: Continental Automotive GmbH
    Inventors: Bingtao Gao, Tongheng Chen, Dehao Liu, James Herbst, Bo Hu, Han Zhang, Cheng Luo, Hans Christian Thiel
  • Publication number: 20250054236
    Abstract: A system and method is provided for measurements of building façade elements by combining ground-level and orthogonal imagery. The measurements of the dimension of building façade elements are based on ground-level imagery that is scaled and geo-referenced using orthogonal imagery. The method continues by creating a tabular dataset of measurements for one or more architectural elements such as siding (e.g., aluminum, vinyl, wood, brick and/or paint), windows or doors. The tabular dataset can be part of an estimate report.
    Type: Application
    Filed: October 28, 2024
    Publication date: February 13, 2025
    Applicant: Hover Inc.
    Inventors: Bo Hu, Sarthak Sahu
  • Publication number: 20250054306
    Abstract: Aspects of the disclosure are directed to methods and systems for short form previews of long form media items. A server can provide, to an artificial intelligence (AI) model, a long form media item to be shared with users. The server can receive, from the AI model, one or more frames that are predicted to contain content that is of interest to the users. The server can extract a segment of the long form media item that corresponds to the one or more frames, where the extracted segment corresponds to a short form media item preview. The short form media item preview can be provided for presentation to the users.
    Type: Application
    Filed: August 7, 2024
    Publication date: February 13, 2025
    Inventors: Daniel S. Cohen, Christopher R. Conover, Emily Rose Smith, Anoop Menon, Benjamin Lehn, Sudheendra Vijayanarasimhan, Bo Hu, Shen Yan, Xuehan Xiong, David Alexander Ross
  • Patent number: 12205999
    Abstract: Provided is a metal-oxide thin-film transistor. The metal-oxide thin-film transistor includes a gate, a gate insulation layer, a metal-oxide semiconductor layer, a source electrode, a drain electrode, and a passivation layer that are successively disposed on a base substrate; wherein the source electrode and the drain electrode are both in a laminated structure, wherein the laminated structure of the source electrode or the drain electrode at least includes a bulk metal layer and an electrode protection layer; wherein the electrode protection layer includes a metal or a metal alloy; the electrode protection layer is at least disposed between the metal-oxide semiconductor layer and the bulk metal layer; wherein a metal-oxide layer is disposed between the electrode protection layer and the bulk metal layer.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 21, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Bin Lin, Liangliang Li, Zheng Liu, Bo Hu, Rui Zhang, Xinlin Peng
  • Patent number: 12204560
    Abstract: A classification apparatus 10 acquires a communication log including a plurality of pieces of traffic data, and extracts different types of feature values from the plurality of pieces of traffic data. Subsequently, the classification apparatus 10 classifies the traffic data on a per IP address basis based on the extracted different types of feature values, and uses a plurality of classification results to count the number of times of appearance of a pattern having the same combination of the classification results.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: January 21, 2025
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Shohei Araki, Bo Hu, Kazunori Kamiya, Masaki Tanikawa
  • Patent number: D1080205
    Type: Grant
    Filed: April 16, 2025
    Date of Patent: June 24, 2025
    Inventor: Bo Hu