Abstract: An approach for protecting the circuit trade of a printed circuit board from oxidation that may occur due the permeability of the underlying substrate. A layer of silver is positioned between the circuit trace and the substrate, such as by immersion plating, during manufacturing of the printed circuit board. The layer of silver is preferably applied over the seed-conductor after a negative photo resist layer has been applied to the substrate and before the copper is plated to form the circuit trace. The resist and seed-conductor outside of the circuit trace may then be removed to leave the protected circuit trace. An additional layer of silver may be plated over the copper trace to protect the exterior and side surface of the trace.

Abstract: A device includes a thermally conductive and electrically insulative substrate having a first major surface and a second major surface. A coupling structure is configured to reduce the RF input signal by substantially a predetermined amount of attenuation power. A tuning circuit is characterized by a tuning reactance substantially matched to a predetermined system impedance. A resistor is disposed on a majority of the first major surface and is characterized by a parasitic capacitance that is substantially negated by the tuning reactance. The resistor includes a first resistive portion and a second resistive portion; each of the first resistive portion and the second resistive portion being configured to direct approximately one-half of the attenuation power to the ground portion.

Abstract: A device includes a thermally conductive and electrically insulative substrate having a first major surface and a second major surface. A coupling structure is configured to reduce the RF input signal by substantially a predetermined amount of attenuation power. A tuning circuit is characterized by a tuning reactance substantially matched to a predetermined system impedance. A resistor is disposed on a majority of the first major surface and is characterized by a parasitic capacitance that is substantially negated by the tuning reactance. The resistor includes a first resistive portion and a second resistive portion; each of the first resistive portion and the second resistive portion being configured to direct approximately one-half of the attenuation power to the ground portion.

Abstract: A self-cascadable phase shifter having a two corresponding pairs of input and output pins. Each pair of input and output pins are interconnected by phase delay circuitry that is isolated from phase delay circuitry interconnecting the other pair of input and output pins so that each pair of input and output pins produces, for example, a 90 degree phase shift. The resulting phase shifter can be used to produce a 90 degree by using one pair of input and output pins or cascading both pairs of input and output pins to provide a 180 degree delay.

Abstract: A self-cascadable phase shifter having a two corresponding pairs of input and output pins. Each pair of input and output pins are interconnected by phase delay circuitry that is isolated from phase delay circuitry interconnecting the other pair of input and output pins so that each pair of input and output pins produces, for example, a 90 degree phase shift. The resulting phase shifter can be used to produce a 90 degree by using one pair of input and output pins or cascading both pairs of input and output pins to provide a 180 degree delay.

Abstract: The present invention is directed to a method for making a hybrid material stripline device. The method includes providing an inner layer of material, the inner layer including a dielectric material and at least one conductive sheet. At least one stripline device is formed in the inner layer by processing the at least one conductive sheet. The at least one stripline device is characterized by a surface area footprint. A first exterior layer and a second exterior layer are provided. At least one of the first exterior layer and/or the second exterior layer includes at least one ceramic portion. The at least one ceramic portion has a ceramic surface area greater than or substantially equal to the surface area footprint of the at least one stripline device. At least one of the first exterior layer and/or the second exterior layer further includes a softboard dielectric material. The inner layer of material is sandwiched between the first exterior layer and the second exterior layer.

Abstract: The present invention is directed to a method for making a hybrid material stripline device. The method includes providing an inner layer of material, the inner layer including a dielectric material and at least one conductive sheet. At least one stripline device is formed in the inner layer by processing the at least one conductive sheet. The at least one stripline device is characterized by a surface area footprint. A first exterior layer and a second exterior layer are provided. At least one of the first exterior layer and/or the second exterior layer includes at least one ceramic portion. The at least one ceramic portion has a ceramic surface area greater than or substantially equal to the surface area footprint of the at least one stripline device. At least one of the first exterior layer and/or the second exterior layer further includes a softboard dielectric material. The inner layer of material is sandwiched between the first exterior layer and the second exterior layer.