Patents by Inventor Bo-Jou Lu

Bo-Jou Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11043460
    Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.
    Type: Grant
    Filed: August 23, 2020
    Date of Patent: June 22, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Wei Cheng, Bo-Jou Lu, Chun-Chi Yu
  • Publication number: 20200388577
    Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.
    Type: Application
    Filed: August 23, 2020
    Publication date: December 10, 2020
    Inventors: Yu-Wei Cheng, Bo-Jou Lu, Chun-Chi Yu
  • Patent number: 10811362
    Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: October 20, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yu-Wei Cheng, Bo-Jou Lu, Chun-Chi Yu
  • Publication number: 20200219821
    Abstract: An overlay mark structure includes a plurality of first patterns of a previous layer and a plurality of second patterns of a current layer. Each of the second patterns includes a first section and a second section. The first section is disposed corresponding to one of the first patterns in a vertical direction. The first section partially overlaps the first pattern corresponding to the first section in the vertical direction. The second section is separated from the first section in an elongation direction of the second pattern. A part of the first pattern corresponding to the first section is disposed between the first section and the second section in the elongation direction of the second pattern. A measurement method of the overlay mark structure includes performing a diffraction-based overlay measurement between each of the first sections and the first pattern overlapping the first section.
    Type: Application
    Filed: January 9, 2019
    Publication date: July 9, 2020
    Inventors: Yu-Wei Cheng, Bo-Jou Lu, Chun-Chi Yu
  • Patent number: 7633601
    Abstract: To avoid the yield of wafers that undergo immersion lithography influencing by delay of post exposure baking (PEB), an operation system adjusts a speed of inputting the wafers to undergo immersion lithography according to a status of wafers that have finished exposure and are waiting for baking. Therefore, the wafers that have finished exposure are transmitted to be baked efficiently and on time.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: December 15, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Yong-Fa Huang, Benjamin Szu-Min Lin, Chun-Chi Yu, Huan-Ting Tseng, Bo-Jou Lu
  • Publication number: 20080067335
    Abstract: A method of moving bubbles includes utilizing optical tweezers to form a bright photoresist area and a dark photoresist area in the photoresist layer. The bubbles in the photoresist layer move from the bright photoresist area to the dark photoresist area.
    Type: Application
    Filed: July 17, 2006
    Publication date: March 20, 2008
    Inventors: Ya-Ching Hou, Huan-Ting Tseng, Benjamin Szu-Min Lin, Bo-Jou Lu, Yong-Fa Huang, Chun-Chi Yu
  • Publication number: 20070215040
    Abstract: To avoid the yield of wafers that undergo immersion lithography influencing by delay of post exposure baking (PEB), an operation system adjusts a speed of inputting the wafers to undergo immersion lithography according to a status of wafers that have finished exposure and are waiting for baking. Therefore, the wafers that have finished exposure are transmitted to be baked efficiently and on time.
    Type: Application
    Filed: March 14, 2006
    Publication date: September 20, 2007
    Inventors: Yong-Fa Huang, Benjamin Szu-Min Lin, Chun-Chi Yu, Huan-Ting Tseng, Bo-Jou Lu