Patents by Inventor Bo-Kai Wang

Bo-Kai Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11927780
    Abstract: A dielectric grating apparatus comprises a substrate; a grating layer, disposed above the substrate; a first interference layer, disposed above the substrate; and a second interference layer, adjacent to the first interference layer, wherein a refractive index of a material of the second interference layer is greater than a refractive index of a material of the first interference layer.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: March 12, 2024
    Assignee: NATIONAL CHUNG SHAN INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jian-Hung Lin, Chiang-Hsin Lin, Po-Tse Tai, Tsong-Dong Wang, Bo-Kai Feng
  • Publication number: 20240075558
    Abstract: A processing method of a single crystal material includes the following steps. A single crystal material is provided as an object to be modified. The amorphous phase modification apparatus is used for emitting a femtosecond laser beam to process an internal portion of the object to be modified. The processing includes using a femtosecond laser beam to form a plurality of processing lines in the internal portion of the object to be modified, wherein each of the processing lines include a zigzag pattern processing, and a processing line spacing between the plurality of processing lines is in a range of 200 ?m to 600 ?m, wherein after the object to be modified is processed, a modified layer is formed in the object to be modified. Slicing or separating out a portion in the object to be modified that includes the modified layer.
    Type: Application
    Filed: August 23, 2023
    Publication date: March 7, 2024
    Applicants: GlobalWafers Co., Ltd., mRadian Femto Sources Co., Ltd.
    Inventors: Chien Chung Lee, Bo-Kai Wang, Shang-Chi Wang, Chia-Chi Tsai, I-Ching Li
  • Patent number: 11773633
    Abstract: An unlock mechanism includes a socket, a handle, a driving member, a driving shaft and a moving member. The socket includes a pivot hole. The handle includes a pivot shaft. The pivot shaft is rotatably disposed in the pivot hole. The driving member is movably disposed in the socket and sleeved on the pivot shaft. The driving member includes an inclined surface. The driving shaft is disposed on the pivot shaft and abuts against the inclined surface. The moving member is connected to the driving member. The handle rotates to drive the driving shaft to rotate, the driving shaft pushes the inclined surface to drive the driving member to move, and the driving member drives the moving member to move.
    Type: Grant
    Filed: November 24, 2021
    Date of Patent: October 3, 2023
    Assignee: Wiwynn Corporation
    Inventors: Chi-Luen Chen, Jing-Suei Gao, Bo-Kai Wang
  • Publication number: 20230085694
    Abstract: An unlock mechanism includes a socket, a handle, a driving member, a driving shaft and a moving member. The socket includes a pivot hole. The handle includes a pivot shaft. The pivot shaft is rotatably disposed in the pivot hole. The driving member is movably disposed in the socket and sleeved on the pivot shaft. The driving member includes an inclined surface. The driving shaft is disposed on the pivot shaft and abuts against the inclined surface. The moving member is connected to the driving member. The handle rotates to drive the driving shaft to rotate, the driving shaft pushes the inclined surface to drive the driving member to move, and the driving member drives the moving member to move.
    Type: Application
    Filed: November 24, 2021
    Publication date: March 23, 2023
    Applicant: Wiwynn Corporation
    Inventors: Chi-Luen Chen, Jing-Suei Gao, Bo-Kai Wang
  • Patent number: 11534794
    Abstract: A method for forming an isolating layer of a crucible includes placing a round crucible sideways with a bottom surface of an inside thereof perpendicular to a horizontal plane, and then performing a plurality of spraying processes to form the isolating layer on the bottom surface and a wall surface of the round crucible. Each spraying process includes spraying a slurry on the bottom surface; using an optical positioner to set a spraying range the same as one of a plurality of partial areas divided from the wall surface; aligning one of the plurality of partial areas with the spraying range; fixing the round crucible and spraying the slurry in the spraying range; stopping the spraying; and rotating the round crucible to move another partial area to the spraying range. Then, the steps are repeated until the spraying of all the partial areas is completed.
    Type: Grant
    Filed: May 25, 2020
    Date of Patent: December 27, 2022
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Yu-Min Yang, Huang-Wei Lin, Bo-Kai Wang, Sung-Lin Hsu, Ying-Ru Shih
  • Publication number: 20220240406
    Abstract: A mount bracket is adapted to fix a storage device to a first side plate. The mount bracket includes a base part and a handle. The base part includes a first support portion and a second support portion. The first support portion is configured to be removably disposed on the first side plate. The first support portion has at least one first buffering structure configured to be in contact with the first side plate. The second support portion is connected to the first support portion and configured to support the storage device. The handle is pivotably disposed on the base part.
    Type: Application
    Filed: November 23, 2021
    Publication date: July 28, 2022
    Inventors: CHIA-HSIN HSIEH, CYUAN LEE, Bo-Kai Wang
  • Publication number: 20200398304
    Abstract: A method for forming an isolating layer of a crucible includes placing a round crucible sideways with a bottom surface of an inside thereof perpendicular to a horizontal plane, and then performing a plurality of spraying processes to form the isolating layer on the bottom surface and a wall surface of the round crucible. Each spraying process includes spraying a slurry on the bottom surface; using an optical positioner to set a spraying range the same as one of a plurality of partial areas divided from the wall surface; aligning one of the plurality of partial areas with the spraying range; fixing the round crucible and spraying the slurry in the spraying range; stopping the spraying; and rotating the round crucible to move another partial area to the spraying range. Then, the steps are repeated until the spraying of all the partial areas is completed.
    Type: Application
    Filed: May 25, 2020
    Publication date: December 24, 2020
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Yu-Min Yang, Huang-Wei Lin, Bo-Kai Wang, Sung-Lin Hsu, Ying-Ru Shih
  • Patent number: 10825940
    Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 3, 2020
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Patent number: 10510830
    Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
    Type: Grant
    Filed: September 2, 2018
    Date of Patent: December 17, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
  • Patent number: 10297702
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: May 21, 2019
    Assignee: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20190096987
    Abstract: An N-type polysilicon crystal, a manufacturing method thereof, and an N-type polysilicon wafer are provided. The N-type polysilicon crystal has a slope of resistivity and a slope of defect area percentage. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to resistivity presented by a unit of Ohm·cm (?·cm), the slope of resistivity is 0 to ?1.8 at the solidified fraction of 0.25 to 0.8. When the horizontal axis is referred to solidified fraction and the vertical axis is referred to defect area percentage (%), the slope of defect area percentage is less than 2.5 at the solidified fraction of 0.4 to 0.8.
    Type: Application
    Filed: September 2, 2018
    Publication date: March 28, 2019
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Ching-Hung Weng, Cheng-Jui Yang, Yu-Min Yang, Yuan-Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Ying-Ru Shih, Sung-Lin Hsu
  • Publication number: 20190035946
    Abstract: A solar cell wafer is provided. It is a silicon wafer, and a surface of the silicon wafer has a plurality of pores, wherein based on a total amount of 100% of the plurality of pores, 60% or more of the pores has a circularity greater than 0.5. Therefore, the reflectance of the solar cell wafer can be efficiently reduced.
    Type: Application
    Filed: April 27, 2018
    Publication date: January 31, 2019
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Jian-Jia Huang, Ming-Kung Hsiao, Cheng-Wei Gu, Bo-Kai Wang, Wen-Huai Yu, I-Ching Li, Sung-Lin Hsu, Wen-Ching Hsu
  • Patent number: 9953461
    Abstract: A navigation system includes a measurement unit that outputs a positioning signal associated with positioning coordinates, a navigation unit that obtains guidance indication and that outputs a navigation signal, and an image unit that includes a capturing module capturing a series of planar images, a computation module and an augmented reality module. The computation module generates an optical flow signal for obtaining the positioning coordinates, and further outputs a registration signal. The augmented reality module performs image registration processing based on the navigation signal and the registration signal, so that the guidance indication is superimposed on the series of planar images of real-world scene for subsequent display.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: April 24, 2018
    Assignees: Institute of Nuclear Energy Research Atomic Energy Council, Executive Yuan, National Yunlin University of Science & Technology
    Inventors: Chung-Hao Huang, Lun-Hui Lee, Chian-Cheng Ho, Bo-Kai Wang
  • Publication number: 20170116783
    Abstract: A navigation system includes a measurement unit that outputs a positioning signal associated with positioning coordinates, a navigation unit that obtains guidance indication and that outputs a navigation signal, and an image unit that includes a capturing module capturing a series of planar images, a computation module and an augmented reality module. The computation module generates an optical flow signal for obtaining the positioning coordinates, and further outputs a registration signal. The augmented reality module performs image registration processing based on the navigation signal and the registration signal, so that the guidance indication is superimposed on the series of planar images of real-world scene for subsequent display.
    Type: Application
    Filed: September 6, 2016
    Publication date: April 27, 2017
    Inventors: Chung-Hao Huang, Lun-Hui Lee, Chian-Cheng Ho, Bo-Kai Wang
  • Publication number: 20170062635
    Abstract: A polycrystalline silicon wafer is provided. The polycrystalline silicon wafer, includes a plurality of silicon grains, wherein the carbon content of the polycrystalline silicon wafer is greater than 4 ppma, and the resistivity of the polycrystalline silicon wafer is greater than or equal to 1.55 ?-cm.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu
  • Publication number: 20170058428
    Abstract: A polycrystalline silicon column is provided. The polycrystalline silicon column includes a plurality of silicon grains grown along a crystal-growing direction. In the crystal-growing direction, the average grain size of the silicon grains and the resistivity of the polycrystalline silicon column have opposite variation in their trends, the average grain size of the silicon grains and the oxygen content of the polycrystalline silicon column have opposite variation in their trends, and the average grain size of the silicon grains and the defect area ratio of the polycrystalline silicon column have the same variation in their trends. The overall average defect area ratio of the polycrystalline silicon column is less than or equal to 2.5%.
    Type: Application
    Filed: August 26, 2016
    Publication date: March 2, 2017
    Applicant: Sino-American Silicon Products Inc.
    Inventors: Cheng-Jui Yang, Huang Wei Lin, Yu-Min Yang, Kuo-Wei Chuang, Ming-Kung Hsiao, Yuan Hsiao Chang, Bo-Kai Wang, Wen-Huai Yu, Sung Lin Hsu, I-Ching Li, Wen-Ching Hsu