Patents by Inventor Bo-Kyeong Kim
Bo-Kyeong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240094945Abstract: Provided herein may be a memory controller and a memory system including the same. The memory system may include a plurality of memory devices, each including a plurality of zone blocks, a buffer memory configured to store pieces of map data that are respectively allocated to a plurality of zones corresponding to logical address groups provided by a host and that indicate correspondence relationships between the plurality of zones and physical addresses of the plurality of zone blocks, and a memory controller configured to perform a data movement operation of storing data, which is stored in a zone block allocated to one of the plurality of zones, in an additional zone block based on information related to the plurality of zone blocks, and update a physical address of the zone block corresponding to the one zone to a physical address of the additional zone block.Type: ApplicationFiled: February 28, 2023Publication date: March 21, 2024Inventor: Bo Kyeong KIM
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Publication number: 20240088270Abstract: Various embodiments pertain to a high mobility transistor element resulting from IGTO oxide semiconductor crystallization, and a production method for same, the transistor element comprising a substrate and a crystalline IGTO channel layer disposed on the substrate, and being produced by converting a non-crystalline IGTO channel layer provided on the substrate to a crystalline IGTO channel layer.Type: ApplicationFiled: November 2, 2021Publication date: March 14, 2024Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)Inventors: Jae Kyeong JEONG, Bo Kyoung KIM, Nuri ON
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Patent number: 11893255Abstract: The embodiments of the present disclosure relate to a memory system for managing data corresponding to a plurality of zones and operating method thereof. According to embodiments of the present disclosure, the memory system may include i) a memory device including a plurality of memory blocks each including a plurality of pages, and ii) a memory controller configured to write data corresponding to a plurality of zones to a first area including two or more of the plurality of memory blocks, flush the data corresponding to a first zone among the plurality of zones to a second area including two or more of the plurality of memory blocks on determination that a flush condition set for the first zone is satisfied.Type: GrantFiled: April 22, 2022Date of Patent: February 6, 2024Assignee: SK hynix Inc.Inventor: Bo Kyeong Kim
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Publication number: 20230325111Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.Type: ApplicationFiled: June 1, 2023Publication date: October 12, 2023Inventors: Yu Jung LEE, Bo Kyeong KIM, Do Hyeong LEE, Min Kyu CHOI
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Patent number: 11698748Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.Type: GrantFiled: May 4, 2021Date of Patent: July 11, 2023Assignee: SK hynix Inc.Inventors: Yu Jung Lee, Bo Kyeong Kim, Do Hyeong Lee, Min Kyu Choi
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Patent number: 11691891Abstract: Proposed are a layered Group III-V compound having ferroelectric properties, a Group III-V compound nanosheet that may be prepared using the same, and an electrical device including the materials. Proposed is a layered compound represented by [Formula 1] Mx?mAyBz (M is at least one of Group I or Group II elements, A is at least one of Group III elements, B is at least one of Group V elements, x, y, and z are positive numbers which are determined according to stoichiometric ratios to ensure charge balance when m is 0, and 0<m<x), and having ferroelectric-like properties.Type: GrantFiled: December 3, 2020Date of Patent: July 4, 2023Assignee: Industry-Academic Cooperation Foundation, Yonsei UniversityInventors: Woo-young Shim, Min-jung Kim, Tae-young Kim, Hong Choi, Jong-bum Won, Ji-hong Bae, Sang-jin Choi, Bo-kyeong Kim
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Publication number: 20230195342Abstract: The embodiments of the present disclosure relate to a memory system for managing data corresponding to a plurality of zones and operating method thereof. According to embodiments of the present disclosure, the memory system may include i) a memory device including a plurality of memory blocks each including a plurality of pages, and ii) a memory controller configured to write data corresponding to a plurality of zones to a first area including two or more of the plurality of memory blocks, flush the data corresponding to a first zone among the plurality of zones to a second area including two or more of the plurality of memory blocks on determination that a flush condition set for the first zone is satisfied.Type: ApplicationFiled: April 22, 2022Publication date: June 22, 2023Inventor: Bo Kyeong KIM
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Patent number: 11599268Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed includes a memory device including a plurality of memory areas, a buffer memory configured to store first parity information including a parity for data stored in each of one or more first memory areas among the plurality of memory areas, and a memory controller configured to store second parity information including a parity for data stored in each of one or more second memory areas except for the one or more first memory areas among the plurality of memory areas and control the memory device to store, when a sudden power off occurs, dump parity information including some of the first parity information and the second parity information.Type: GrantFiled: April 2, 2021Date of Patent: March 7, 2023Assignee: SK hynix Inc.Inventor: Bo Kyeong Kim
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Publication number: 20220144661Abstract: Proposed are a layered Group III-V compound having ferroelectric properties, a Group III-V compound nanosheet that may be prepared using the same, and an electrical device including the materials. Proposed is a layered compound represented by [Formula 1] Mx?mAyBz (M is at least one of Group I or Group II elements, A is at least one of Group III elements, B is at least one of Group V elements, x, y, and z are positive numbers which are determined according to stoichiometric ratios to ensure charge balance when m is 0, and 0<m<x), and having ferroelectric-like properties.Type: ApplicationFiled: December 3, 2020Publication date: May 12, 2022Inventors: Woo-young SHIM, Min-jung KIM, Tae-young KIM, Hong CHOI, Jong-bum WON, Ji-hong BAE, Sang-jin CHOI, Bo-kyeong KIM
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Publication number: 20220137858Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.Type: ApplicationFiled: May 4, 2021Publication date: May 5, 2022Inventors: Yu Jung LEE, Bo Kyeong KIM, Do Hyeong LEE, Min Kyu CHOI
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Publication number: 20220107734Abstract: The present technology relates to an electronic device. According to the present technology, a storage device having an improved operation speed includes a memory device including a plurality of memory areas, a buffer memory configured to store first parity information including a parity for data stored in each of one or more first memory areas among the plurality of memory areas, and a memory controller configured to store second parity information including a parity for data stored in each of one or more second memory areas except for the one or more first memory areas among the plurality of memory areas and control the memory device to store, when a sudden power off occurs, dump parity information including some of the first parity information and the second parity information.Type: ApplicationFiled: April 2, 2021Publication date: April 7, 2022Inventor: Bo Kyeong KIM
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Patent number: 11215125Abstract: An electronic throttle valve apparatus including a suction pressure sensor provided on the upstream of a throttle valve to measure pressure of an intake air that flows into the throttle valve is provided. The electronic throttle valve apparatus includes a throttle housing having one side installed in an intake manifold of an engine. Within an inside of the throttle housing, a throttle valve is rotatably provided. The electronic throttle valve apparatus further includes an air tube fastened to the other side of the throttle housing and fastened to an intake flow line, and a suction pressure sensor provided in the air tube and configured to measure pressure of an intake air that flows through the intake flow line. Accordingly, the suction pressure sensor is provided in the air tube that is fastened to the throttle housing, and thus the pressure of the intake air that flows into the throttle valve is easily measured.Type: GrantFiled: August 20, 2019Date of Patent: January 4, 2022Assignee: HYUNDAI KEFICO CORPORATIONInventors: Bo Kyeong Kim, Jin Kwan Kim, Joon Ho Yang
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Patent number: 10859005Abstract: Provided is a throttle valve assembly which reduces weight, number of manufacturing processes, and manufacturing cost thereof by coupling a throttle body formed of plastic to a reinforcement portion manufactured by a die casting method with an insert method. The throttle valve assembly includes a valve body having an intake passage, a mounting space that communicates with the intake passage, a motor accommodating space, and a mounting groove formed between the mounting space and the motor accommodating space. The valve body includes plastic. The throttle valve assembly further includes a valve plate coupled to a rotary shaft rotatably installed in the intake passage of the valve body to adjust an amount of air or a mixed gas ingested into an engine; and a reinforcement portion formed of a metal and coupled to an inside of the valve body by an insert injection method.Type: GrantFiled: December 27, 2018Date of Patent: December 8, 2020Assignee: HYUNDAI KEFICO CORPORATIONInventor: Bo Kyeong Kim
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Patent number: 10842101Abstract: The present invention relates to Ofree, a novel wheat cultivar produced by crossing Keumkang wheat and Olgeuru wheat, in which low-molecular-weight glutenin subunit (LMW-GS) alleles located at the Glu-B3 loci (major cause of gluten intolerance) and ?-5 gliadin genes (major cause of wheat-dependent exercise-induced anaphylaxis (WDEIA)) have been deleted; a method of developing a new wheat cultivar using Ofree; wheat flour produced from Ofree; a method of producing a processed food using the wheat flour; and a processed food produced by the aforementioned production method. It is expected that Ofree provided in the present invention can be widely used for the production of processed foods capable of preventing the onset of celiac disease caused by gluten intolerance and the onset of WDEIA.Type: GrantFiled: June 16, 2017Date of Patent: November 24, 2020Assignees: REPUBLIC OF KOREA (MANAGEMENT: RURAL DEVELOPMENT ADMINISTRATION), INDUSTRIAL COOPERATION FOUNDATION CHONBUK NATIONAL UNIVERSITYInventors: Chon Sik Kang, Jong-Yeol Lee, Chul Soo Park, Young Keun Cheong, Kyeong Hoon Kim, Jae Han Son, Jong Chul Park, Kwang Geun Park, Ki Hun Park, Young-Mi Kim, Sun-Hyung Lim, Bo Kyeong Kim
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Publication number: 20200063663Abstract: An electronic throttle valve apparatus including a suction pressure sensor provided on the upstream of a throttle valve to measure pressure of an intake air that flows into the throttle valve is provided. The electronic throttle valve apparatus includes a throttle housing having one side installed in an intake manifold of an engine. Within an inside of the throttle housing, a throttle valve is rotatably provided. The electronic throttle valve apparatus further includes an air tube fastened to the other side of the throttle housing and fastened to an intake flow line, and a suction pressure sensor provided in the air tube and configured to measure pressure of an intake air that flows through the intake flow line. Accordingly, the suction pressure sensor is provided in the air tube that is fastened to the throttle housing, and thus the pressure of the intake air that flows into the throttle valve is easily measured.Type: ApplicationFiled: August 20, 2019Publication date: February 27, 2020Inventors: Bo Kyeong Kim, Jin Kwan KIM, Joon Ho Yang
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Publication number: 20190195145Abstract: Provided is a throttle valve assembly which reduces weight, number of manufacturing processes, and manufacturing cost thereof by coupling a throttle body formed of plastic to a reinforcement portion manufactured by a die casting method with an insert method. The throttle valve assembly includes a valve body having an intake passage, a mounting space that communicates with the intake passage, a motor accommodating space, and a mounting groove formed between the mounting space and the motor accommodating space. The valve body includes plastic. The throttle valve assembly further includes a valve plate coupled to a rotary shaft rotatably installed in the intake passage of the valve body to adjust an amount of air or a mixed gas ingested into an engine; and a reinforcement portion formed of a metal and coupled to an inside of the valve body by an insert injection method.Type: ApplicationFiled: December 27, 2018Publication date: June 27, 2019Inventor: Bo Kyeong Kim
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Publication number: 20190126226Abstract: Provided is an integrated-type carbon dioxide generator comprising: an upper container accommodating an acid or aqueous solution thereof and including an oulet pipe through which a carbon dioxide gas is discharged; a lower container located under the upper container and accommodating a base containing a salt of carbonic acid or aqueous solution thereof; a dropping hole area formed in a bottom surface of the upper container such that the acid or aqueous solution thereof is supplied from the upper container to the lower container by gravity; a speed control valve that is externally manipulable and configured to open and close the dropping hole area; and a pressure equilibrium and gas passage pipe configured to form a path through which carbon dioxide generated in the lower container is transferred to the upper container.Type: ApplicationFiled: December 21, 2017Publication date: May 2, 2019Inventor: Bo Kyeong KIM
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Publication number: 20180352778Abstract: The present invention relates to Ofree, a novel wheat cultivar produced by crossing Keumkang wheat and Olgeuru wheat, in which low-molecular-weight glutenin subunit (LMW-GS) alleles located at the Glu-B3 loci (major cause of gluten intolerance) and ?-5 gliadin genes (major cause of wheat-dependent exercise-induced anaphylaxis (WDEIA)) have been deleted; a method of developing a new wheat cultivar using Ofree; wheat flour produced from Ofree; a method of producing a processed food using the wheat flour; and a processed food produced by the aforementioned production method. It is expected that Ofree provided in the present invention can be widely used for the production of processed foods capable of preventing the onset of celiac disease caused by gluten intolerance and the onset of WDEIA.Type: ApplicationFiled: June 16, 2017Publication date: December 13, 2018Inventors: Chon Sik KANG, Jong-Yeol LEE, Chul Soo PARK, Young Keun CHEONG, Kyeong Hoon KIM, Jae Han SON, Jong Chul PARK, Kwang Geun PARK, Ki Hun PARK, Young-Mi KIM, Sun-Hyung LIM, Bo Kyeong KIM
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Publication number: 20100131215Abstract: An insulation detecting apparatus of the present invention comprises a voltage detecting means for detecting a voltage component of each of three phases, a zero-phase current transformer for detecting zero-phase leakage current flowing between the power line and ground, a leakage current detecting means for converting a leakage current component detected by the zero-phase current transformer into a voltage component and extracting a frequency component lower than a certain frequency or a frequency component of a commercial frequency band, a phase comparing means for detecting a phase difference between an output value of each of the three phases of the voltage detecting means and an output value of the leakage current detecting means, an analog-to-digital conversion unit for converting the output value of the leakage current detecting means into a digital component, an operation controller for reading and outputting a variety of data, and an input-output unit.Type: ApplicationFiled: August 16, 2007Publication date: May 27, 2010Inventor: Bo-Kyeong Kim