Abstract: A concurrent write duplexing device with extension of memory bus according to the present invention includes: a primary memory having a first memory in which changed information is stored and a first memory controller for controlling the first memory; a secondary memory having a second memory in which the operating system is loaded to change an operation mode from the standby module to the active module upon failure of duplexing separation and a second memory controller for controlling the second memory; a bus transceiver part for exchanging data with a CPU through a system bus and having a bus transceiver in the first memory controller and a bus transceiver in the second memory controller, to thereby determine as to whether the first and second memory controller operate; and a memory switch part for exchanging data between the active module and the standby module and having memory switches which set direction of memory bus in accordance with an operation mode of module, so that write operation performed in t