Patents by Inventor Bo-Syuan Lee
Bo-Syuan Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8999793Abstract: A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from inner to outer. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.Type: GrantFiled: June 17, 2014Date of Patent: April 7, 2015Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Patent number: 8883033Abstract: A method for removing silicon nitride material includes following steps. A substrate having at least a gate structure formed thereon is provided, and at least a silicon nitride hard mask is formed on top of the gate structure. A first removal is performed to remove a portion of the silicon nitride hard mask with a first phosphoric acid (H3PO4) solution. A second removal is subsequently performed to remove remnant silicon nitride hard mask with a second phosphoric acid solution. The first removal and the second removal are performed in-situ. A temperature of the second phosphoric acid solution is lower than a temperature of the first phosphoric acid solution.Type: GrantFiled: March 5, 2013Date of Patent: November 11, 2014Assignee: United Microelectronics Corp.Inventors: Chi-Sheng Chen, Shin-Chi Chen, Chih-Yueh Li, Ted Ming-Lang Guo, Bo-Syuan Lee, Tsung-Hsun Tsai, Yu-Chin Cheng
-
Publication number: 20140295634Abstract: A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from inner to outer. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.Type: ApplicationFiled: June 17, 2014Publication date: October 2, 2014Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Publication number: 20140256151Abstract: A method for removing silicon nitride material includes following steps. A substrate having at least a gate structure formed thereon is provided, and at least a silicon nitride hard mask is formed on top of the gate structure. A first removal is performed to remove a portion of the silicon nitride hard mask with a first phosphoric acid (H3PO4) solution. A second removal is subsequently performed to remove remnant silicon nitride hard mask with a second phosphoric acid solution. The first removal and the second removal are performed in-situ. A temperature of the second phosphoric acid solution is lower than a temperature of the first phosphoric acid solution.Type: ApplicationFiled: March 5, 2013Publication date: September 11, 2014Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chi-Sheng Chen, Shin-Chi Chen, Chih-Yueh Li, Ted Ming-Lang Guo, Bo-Syuan Lee, Tsung-Hsun Tsai, Yu-Chin Cheng
-
Patent number: 8796695Abstract: A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from bottom to top. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.Type: GrantFiled: June 22, 2012Date of Patent: August 5, 2014Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Patent number: 8709910Abstract: A semiconductor process includes the following steps. A semiconductor substrate is provided. The semiconductor substrate has a patterned isolation layer and the patterned isolation layer has an opening exposing a silicon area of the semiconductor substrate. A silicon rich layer is formed on the sidewalls of the opening. An epitaxial process is performed to form an epitaxial structure on the silicon area in the opening.Type: GrantFiled: April 30, 2012Date of Patent: April 29, 2014Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Chia-Lin Hsu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee, Min-Chung Cheng
-
Patent number: 8674433Abstract: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate. An oxide layer is formed on the substrate without the fin-shaped structure being formed thereon. A gate is formed to cover a part of the oxide layer and a part of the fin-shaped structure. An etching process is performed to etch a part of the fin-shaped structure beside the gate, therefore at least a recess is formed in the fin-shaped structure. An epitaxial process is performed to form an epitaxial layer in the recess, wherein the epitaxial layer has a hexagon-shaped profile structure.Type: GrantFiled: August 24, 2011Date of Patent: March 18, 2014Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Hsin-Huei Wu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Publication number: 20130341638Abstract: A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a substrate. The gate structure is disposed across a part of the fin-shaped structure and the substrate. The epitaxial structure is located on the fin-shaped structure beside the gate structure. The gradient cap layer is located on each of the epitaxial structures. The gradient cap layer is a compound semiconductor, and the concentration of one of the ingredients of the compound semiconductor has a gradient distribution decreasing from bottom to top. Moreover, the present invention also provides a Multi-Gate Field-Effect Transistor process forming said Multi-Gate Field-Effect Transistor.Type: ApplicationFiled: June 22, 2012Publication date: December 26, 2013Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Publication number: 20130288448Abstract: A semiconductor process includes the following steps. A semiconductor substrate is provided. The semiconductor substrate has a patterned isolation layer and the patterned isolation layer has an opening exposing a silicon area of the semiconductor substrate. A silicon rich layer is formed on the sidewalls of the opening. An epitaxial process is performed to form an epitaxial structure on the silicon area in the opening.Type: ApplicationFiled: April 30, 2012Publication date: October 31, 2013Inventors: Chin-I Liao, Chia-Lin Hsu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee, Min-Chung Cheng
-
Publication number: 20130122698Abstract: A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer and a patterned hard mask sequentially formed thereon, removing the patterned hard mask, performing a thermal treatment to rounding the patterned semiconductor layer with a process temperature lower than 800° C., and sequentially forming a gate dielectric layer and a gate layer covering a portion of the patterned semiconductor layer on the semiconductor substrate.Type: ApplicationFiled: November 16, 2011Publication date: May 16, 2013Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Min-Ying Hsu, Hsin-Huei Wu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Patent number: 8440511Abstract: A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer and a patterned hard mask sequentially formed thereon, removing the patterned hard mask, performing a thermal treatment to rounding the patterned semiconductor layer with a process temperature lower than 800° C., and sequentially forming a gate dielectric layer and a gate layer covering a portion of the patterned semiconductor layer on the semiconductor substrate.Type: GrantFiled: November 16, 2011Date of Patent: May 14, 2013Assignee: United Microelectronics Corp.Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Min-Ying Hsu, Hsin-Huei Wu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee
-
Publication number: 20130052778Abstract: A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate. An oxide layer is formed on the substrate without the fin-shaped structure being formed thereon. A gate is formed to cover a part of the oxide layer and a part of the fin-shaped structure. An etching process is performed to etch a part of the fin-shaped structure beside the gate, therefore at least a recess is formed in the fin-shaped structure. An epitaxial process is performed to form an epitaxial layer in the recess, wherein the epitaxial layer has a hexagon-shaped profile structure.Type: ApplicationFiled: August 24, 2011Publication date: February 28, 2013Inventors: Chin-I Liao, Chia-Lin Hsu, Ming-Yen Li, Hsin-Huei Wu, Yung-Lun Hsieh, Chien-Hao Chen, Bo-Syuan Lee