Patents by Inventor Bo-Tsung TSAI
Bo-Tsung TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250160007Abstract: A method of making a pixel includes doping a workpiece to define a photosensitive device. The method further includes etching the workpiece to define a protrusion and a bulk, wherein the protrusion is above the bulk, and the photosensitive device is in both the protrusion and the bulk. The method further includes doping the protrusion to define a protrusion doping region in the protrusion. The method further includes forming an isolation structure in the protrusion surrounding the protrusion doping region.Type: ApplicationFiled: December 31, 2024Publication date: May 15, 2025Inventor: Bo-Tsung TSAI
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Patent number: 12183767Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion is above the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes an isolation structure in the protrusion, wherein the isolation structure surrounds the protrusion doping region. The pixel further includes a photosensitive device, wherein the photosensitive device is in the bulk and the protrusion.Type: GrantFiled: January 9, 2023Date of Patent: December 31, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventor: Bo-Tsung Tsai
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Publication number: 20240371909Abstract: A method for fabricating an image sensor is provided. The method includes forming a first light-sensitive pixel unit and a second light-sensitive pixel unit neighboring the first light-sensitive pixel unit in a sensor wafer, and bonding the sensor wafer to a circuit wafer. Forming the first light-sensitive pixel unit and the second light-sensitive pixel unit includes forming a first light-sensitive element and a second light-sensitive element in the sensor wafer; and forming a first source contact over the first light-sensitive element and a second source contact over the second light-sensitive element. Bonding the sensor wafer to the circuit wafer is performed such that a first pixel circuit of the circuit wafer is electrically connected to the first source contact, and a second pixel circuit of the circuit wafer is electrically connected to the second source contact.Type: ApplicationFiled: July 15, 2024Publication date: November 7, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung TSAI
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Publication number: 20240313026Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.Type: ApplicationFiled: May 26, 2024Publication date: September 19, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Bo-Tsung Tsai
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Patent number: 12080746Abstract: A method for fabricating an image sensor is provided. The method includes doping a bottom portion of a semiconductor substrate with a first dopant to form a light-sensitive element in the bottom portion of the semiconductor substrate; etching a top portion of the semiconductor substrate to form a post structure on the light-sensitive element; forming a gate structure on at least one sidewall of the post structure, wherein the gate structure exposes a first part of the bottom portion of the semiconductor substrate; doping the exposed first part of the bottom portion of the semiconductor substrate with a second dopant to form a pinning layer on the light-sensitive element, wherein the second dopant has a conductivity type opposite that of the first dopant; and forming a contact on the post structure.Type: GrantFiled: May 6, 2022Date of Patent: September 3, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung Tsai
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Patent number: 12074190Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is laterally adjacent the pinning region. The floating node is in the pinning region, the floating node being spaced from and surrounded by the lightly-doped region. A first portion of the pinning region is between the floating node and the lightly-doped region. The gate stack is over the first portion of the pinning region.Type: GrantFiled: November 22, 2021Date of Patent: August 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung Tsai
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Patent number: 12021103Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.Type: GrantFiled: July 22, 2022Date of Patent: June 25, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Bo-Tsung Tsai
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Publication number: 20230197762Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion is above the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes an isolation structure in the protrusion, wherein the isolation structure surrounds the protrusion doping region. The pixel further includes a photosensitive device, wherein the photosensitive device is in the bulk and the protrusion.Type: ApplicationFiled: January 9, 2023Publication date: June 22, 2023Inventor: Bo-Tsung TSAI
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Patent number: 11581360Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes a photosensitive device comprising a plurality of first regions, wherein each of the plurality of first regions is in the bulk and the protrusion.Type: GrantFiled: October 27, 2020Date of Patent: February 14, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventor: Bo-Tsung Tsai
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Patent number: 11557626Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a floating diffusion node in the protrusion. The pixel further includes a gate structure over the bulk, wherein a top surface of the gate structure is above a top surface of the floating diffusion node. The pixel further includes a photosensitive device in the bulk. The pixel further includes an isolation well surrounding the photosensitive device.Type: GrantFiled: March 25, 2021Date of Patent: January 17, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventor: Bo-Tsung Tsai
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Publication number: 20220359601Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.Type: ApplicationFiled: July 22, 2022Publication date: November 10, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Bo-Tsung Tsai
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Patent number: 11437422Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.Type: GrantFiled: June 1, 2020Date of Patent: September 6, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Bo-Tsung Tsai
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Publication number: 20220262843Abstract: A method for fabricating an image sensor is provided. The method includes doping a bottom portion of a semiconductor substrate with a first dopant to form a light-sensitive element in the bottom portion of the semiconductor substrate; etching a top portion of the semiconductor substrate to form a post structure on the light-sensitive element; forming a gate structure on at least one sidewall of the post structure, wherein the gate structure exposes a first part of the bottom portion of the semiconductor substrate; doping the exposed first part of the bottom portion of the semiconductor substrate with a second dopant to form a pinning layer on the light-sensitive element, wherein the second dopant has a conductivity type opposite that of the first dopant; and forming a contact on the post structure.Type: ApplicationFiled: May 6, 2022Publication date: August 18, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung TSAI
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Patent number: 11329094Abstract: A device includes a substrate, a pinning region in the substrate and having a first doping type, a photodiode in the substrate and having a doped region that has a second doping type opposite to the first doping type, and a first conductive contact. The doped region of the photodiode has a first portion below the pinning region and a second portion extending upwards from a top of the first portion of the doped region of the photodiode to a top of the substrate, and the second portion of the doped region of the photodiode is surrounded by the pinning region. The first conductive contact is disposed over and in contact with the second portion of the doped region of the photodiode.Type: GrantFiled: June 1, 2020Date of Patent: May 10, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung Tsai
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Patent number: 11282707Abstract: A method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer and a plurality of first areas; defining a plurality of first areas and second areas for the first and second zones, respectively; projecting first ion beams onto the first areas and receiving first thermal waves in response to the first ion beams; rotating the first wafer by a twist angle; projecting second ion beams onto the second areas and receiving second thermal waves in response to the second ion beams; and estimating a first crystalline orientation angle of the first wafer based on the first and second ion beams and the first and second thermal waves.Type: GrantFiled: April 7, 2020Date of Patent: March 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventor: Bo-Tsung Tsai
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Publication number: 20220085083Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is laterally adjacent the pinning region. The floating node is in the pinning region, the floating node being spaced from and surrounded by the lightly-doped region. A first portion of the pinning region is between the floating node and the lightly-doped region. The gate stack is over the first portion of the pinning region.Type: ApplicationFiled: November 22, 2021Publication date: March 17, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung TSAI
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Patent number: 11205674Abstract: A method includes forming a light-sensitive element in a substrate. The substrate is doped with a first dopant to form a pinning region over a first portion of the light-sensitive element. A second portion of the light-sensitive element is surrounded by the pinning region. A first contact is formed in contact with the second portion of the light-sensitive element, and a second contact is formed over the pinning region.Type: GrantFiled: November 25, 2019Date of Patent: December 21, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung Tsai
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Patent number: 11183532Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is in the pinning region. The floating node is in the pinning region. The floating node is spaced from and is surrounded by the lightly-doped region. A first portion of the pinning region between the floating node and the lightly-doped region forms a channel region. A gate stack is over the channel region.Type: GrantFiled: November 25, 2019Date of Patent: November 23, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Bo-Tsung Tsai
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Publication number: 20210210545Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a floating diffusion node in the protrusion. The pixel further includes a gate structure over the bulk, wherein a top surface of the gate structure is above a top surface of the floating diffusion node. The pixel further includes a photosensitive device in the bulk. The pixel further includes an isolation well surrounding the photosensitive device.Type: ApplicationFiled: March 25, 2021Publication date: July 8, 2021Inventor: Bo-Tsung TSAI
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Publication number: 20210074759Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes a photosensitive device comprising a plurality of first regions, wherein each of the plurality of first regions is in the bulk and the protrusion.Type: ApplicationFiled: October 27, 2020Publication date: March 11, 2021Inventor: Bo-Tsung TSAI