Patents by Inventor Bo-Tsung TSAI

Bo-Tsung TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250160007
    Abstract: A method of making a pixel includes doping a workpiece to define a photosensitive device. The method further includes etching the workpiece to define a protrusion and a bulk, wherein the protrusion is above the bulk, and the photosensitive device is in both the protrusion and the bulk. The method further includes doping the protrusion to define a protrusion doping region in the protrusion. The method further includes forming an isolation structure in the protrusion surrounding the protrusion doping region.
    Type: Application
    Filed: December 31, 2024
    Publication date: May 15, 2025
    Inventor: Bo-Tsung TSAI
  • Patent number: 12183767
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion is above the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes an isolation structure in the protrusion, wherein the isolation structure surrounds the protrusion doping region. The pixel further includes a photosensitive device, wherein the photosensitive device is in the bulk and the protrusion.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: December 31, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20240371909
    Abstract: A method for fabricating an image sensor is provided. The method includes forming a first light-sensitive pixel unit and a second light-sensitive pixel unit neighboring the first light-sensitive pixel unit in a sensor wafer, and bonding the sensor wafer to a circuit wafer. Forming the first light-sensitive pixel unit and the second light-sensitive pixel unit includes forming a first light-sensitive element and a second light-sensitive element in the sensor wafer; and forming a first source contact over the first light-sensitive element and a second source contact over the second light-sensitive element. Bonding the sensor wafer to the circuit wafer is performed such that a first pixel circuit of the circuit wafer is electrically connected to the first source contact, and a second pixel circuit of the circuit wafer is electrically connected to the second source contact.
    Type: Application
    Filed: July 15, 2024
    Publication date: November 7, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung TSAI
  • Publication number: 20240313026
    Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.
    Type: Application
    Filed: May 26, 2024
    Publication date: September 19, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Bo-Tsung Tsai
  • Patent number: 12080746
    Abstract: A method for fabricating an image sensor is provided. The method includes doping a bottom portion of a semiconductor substrate with a first dopant to form a light-sensitive element in the bottom portion of the semiconductor substrate; etching a top portion of the semiconductor substrate to form a post structure on the light-sensitive element; forming a gate structure on at least one sidewall of the post structure, wherein the gate structure exposes a first part of the bottom portion of the semiconductor substrate; doping the exposed first part of the bottom portion of the semiconductor substrate with a second dopant to form a pinning layer on the light-sensitive element, wherein the second dopant has a conductivity type opposite that of the first dopant; and forming a contact on the post structure.
    Type: Grant
    Filed: May 6, 2022
    Date of Patent: September 3, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung Tsai
  • Patent number: 12074190
    Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is laterally adjacent the pinning region. The floating node is in the pinning region, the floating node being spaced from and surrounded by the lightly-doped region. A first portion of the pinning region is between the floating node and the lightly-doped region. The gate stack is over the first portion of the pinning region.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: August 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung Tsai
  • Patent number: 12021103
    Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.
    Type: Grant
    Filed: July 22, 2022
    Date of Patent: June 25, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20230197762
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion is above the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes an isolation structure in the protrusion, wherein the isolation structure surrounds the protrusion doping region. The pixel further includes a photosensitive device, wherein the photosensitive device is in the bulk and the protrusion.
    Type: Application
    Filed: January 9, 2023
    Publication date: June 22, 2023
    Inventor: Bo-Tsung TSAI
  • Patent number: 11581360
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes a photosensitive device comprising a plurality of first regions, wherein each of the plurality of first regions is in the bulk and the protrusion.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: February 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Bo-Tsung Tsai
  • Patent number: 11557626
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a floating diffusion node in the protrusion. The pixel further includes a gate structure over the bulk, wherein a top surface of the gate structure is above a top surface of the floating diffusion node. The pixel further includes a photosensitive device in the bulk. The pixel further includes an isolation well surrounding the photosensitive device.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: January 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20220359601
    Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 10, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Bo-Tsung Tsai
  • Patent number: 11437422
    Abstract: A hybrid bonded structure including a first integrated circuit component and a second integrated circuit component is provided. The first integrated circuit component includes a first dielectric layer, first conductors and isolation structures. The first conductors and the isolation structures are embedded in the first dielectric layer. The isolation structures are electrically insulated from the first conductors and surround the first conductors. The second integrated circuit component includes a second dielectric layer and second conductors. The second conductors are embedded in the second dielectric layer. The first dielectric layer is bonded to the second dielectric layer and the first conductors are bonded to the second conductors.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: September 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20220262843
    Abstract: A method for fabricating an image sensor is provided. The method includes doping a bottom portion of a semiconductor substrate with a first dopant to form a light-sensitive element in the bottom portion of the semiconductor substrate; etching a top portion of the semiconductor substrate to form a post structure on the light-sensitive element; forming a gate structure on at least one sidewall of the post structure, wherein the gate structure exposes a first part of the bottom portion of the semiconductor substrate; doping the exposed first part of the bottom portion of the semiconductor substrate with a second dopant to form a pinning layer on the light-sensitive element, wherein the second dopant has a conductivity type opposite that of the first dopant; and forming a contact on the post structure.
    Type: Application
    Filed: May 6, 2022
    Publication date: August 18, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung TSAI
  • Patent number: 11329094
    Abstract: A device includes a substrate, a pinning region in the substrate and having a first doping type, a photodiode in the substrate and having a doped region that has a second doping type opposite to the first doping type, and a first conductive contact. The doped region of the photodiode has a first portion below the pinning region and a second portion extending upwards from a top of the first portion of the doped region of the photodiode to a top of the substrate, and the second portion of the doped region of the photodiode is surrounded by the pinning region. The first conductive contact is disposed over and in contact with the second portion of the doped region of the photodiode.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: May 10, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung Tsai
  • Patent number: 11282707
    Abstract: A method includes: receiving a first wafer; defining a first zone and a second zone on the first wafer and a plurality of first areas; defining a plurality of first areas and second areas for the first and second zones, respectively; projecting first ion beams onto the first areas and receiving first thermal waves in response to the first ion beams; rotating the first wafer by a twist angle; projecting second ion beams onto the second areas and receiving second thermal waves in response to the second ion beams; and estimating a first crystalline orientation angle of the first wafer based on the first and second ion beams and the first and second thermal waves.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: March 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20220085083
    Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is laterally adjacent the pinning region. The floating node is in the pinning region, the floating node being spaced from and surrounded by the lightly-doped region. A first portion of the pinning region is between the floating node and the lightly-doped region. The gate stack is over the first portion of the pinning region.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 17, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung TSAI
  • Patent number: 11205674
    Abstract: A method includes forming a light-sensitive element in a substrate. The substrate is doped with a first dopant to form a pinning region over a first portion of the light-sensitive element. A second portion of the light-sensitive element is surrounded by the pinning region. A first contact is formed in contact with the second portion of the light-sensitive element, and a second contact is formed over the pinning region.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung Tsai
  • Patent number: 11183532
    Abstract: A device includes a substrate, a light sensitive element, a pinning region, a lightly-doped region, a floating node, and a gate stack. The light sensitive element is in the substrate. The pinning region is in the substrate and is over the light sensitive element. The lightly-doped region is in the pinning region. The floating node is in the pinning region. The floating node is spaced from and is surrounded by the lightly-doped region. A first portion of the pinning region between the floating node and the lightly-doped region forms a channel region. A gate stack is over the channel region.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: November 23, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Bo-Tsung Tsai
  • Publication number: 20210210545
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a floating diffusion node in the protrusion. The pixel further includes a gate structure over the bulk, wherein a top surface of the gate structure is above a top surface of the floating diffusion node. The pixel further includes a photosensitive device in the bulk. The pixel further includes an isolation well surrounding the photosensitive device.
    Type: Application
    Filed: March 25, 2021
    Publication date: July 8, 2021
    Inventor: Bo-Tsung TSAI
  • Publication number: 20210074759
    Abstract: A pixel includes a workpiece having a protrusion and a bulk, wherein the protrusion extends from an upper surface of the bulk. The pixel further includes a protrusion doping region in the protrusion. The pixel further includes a photosensitive device comprising a plurality of first regions, wherein each of the plurality of first regions is in the bulk and the protrusion.
    Type: Application
    Filed: October 27, 2020
    Publication date: March 11, 2021
    Inventor: Bo-Tsung TSAI